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PC87200 Datasheet(PDF) 24 Page - National Semiconductor (TI) |
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PC87200 Datasheet(HTML) 24 Page - National Semiconductor (TI) |
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24 / 33 page ![]() 8.0 Electrical Characteristics (Continued) 24 www.national.com 8.2.2 NAND Tree Connections During NAND tree testing, all outputs and bi-directional pins will be tri-stated except BALE and RSTDRV pins. The first input of the NAND chain is SA18. The NAND chain is routed counter-clockwise around the chip (eg. SA18, SA19, IRQ9, ...). TC is the intermediate output and RST- DRV is the final output. BALE, PCIRSTX and IRQ7 are not included in the NAND chain because they are required to put the chip to NAND test mode. The NAND tree connec- tion is as shown below. nand_test_en xdma_tc SA18 0 1 SA19 TC SBHEX BPDX SA16 SA17 0 1 nand_test_en RSTDRV ~pad_pcirstx_in nand_test_en test_in irq7 NAND Tree Diagram |
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