AT89C51CC03U-RDTIM datasheet(135/195 Pages) ATMEL

No. de pieza	AT89C51CC03U-RDTIM

Descripción Electrónicos	Enhanced 8-bit MCU with CAN Controller and Flash Memory

PDF	195 Pages

Scroll/Zoom	100%

Fabricante Electrónico	ATMEL [ATMEL Corporation]

Página de inicio	http://www.atmel.com

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135 / 195 page

135

AT89C51CC03

4182I–CAN–06/05

When a transmission is in progress a new data can be queued and sent as soon as

transmission has been completed. So it is possible to transmit bytes without latency,

useful in some applications.

The SPTE bit in SPSCR is set as long as the transmission buffer is free. It means that

the user application can write SPDAT with the data to be transmitted until the SPTE

becomes cleared.

Figure 63 shows a queuing transmission in master mode. Once the Byte 1 is ready, it is

immediately sent on the bus. Meanwhile an other byte is prepared (and the SPTE is

cleared), it will be sent at the end of the current transmission. The next data must be

ready before the end of the current transmission.

Figure 63. Queuing Transmission In Master Mode

In slave mode it is almost the same except it is the external master that start the

transmission.

Also, in slave mode, if no new data is ready, the last value received will be the next data

byte transmitted.

MSB

LSB

MOSI

SCK

MSB

LSB

BYTE 1 under transmission

MSB

LSB MSB

LSB

MISO

Data

Byte 1

Byte 2

Byte 3

SPTE

BYTE 2 under transmission

AT89C51CC03U-RDTIM Datasheet(PDF) 135 Page - ATMEL Corporation