LP3470 datasheet(3/8 Pages) NSC

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

CC Voltage

−0.3V to +6V

Reset Voltage

−0.3V to +6V

Output Current (Reset)

10 mA

Operating Temperature Range

LP3470

−20˚C to +85˚C

LP3470I

−40˚C to +85˚C

Junction Temperature (T

Jmax)

125˚C

Power Dissipation (T

A = 25˚C) (Note

300 mW

JA (Note 2)

280˚C/W

Storage Temp. Range

−65˚C to +150˚C

Lead Temp. (Soldering, 5 sec)

260˚C

ESD Rating (Note 3)

2 kV

Electrical Characteristics

Limits in standard typeface are for T

J = 25˚C, and limits in boldface type apply over the full operating temperature range, un-

less otherwise specified. V

CC = +2.4V to +5.0V unless otherwise noted.

Symbol

Parameter

Conditions

Typ

(Note

Min

(Note

Max

(Note

Units

Operating Voltage Range

0.5

5.5

CC Supply Current

CC = 4.5V

µA

RTH

Reset Threshold Voltage (Note 6)

LP3470

RTH

0.99

RTH

0.99

RTH

1.01

RTH

1.01

RTH

LP3470I

RTH

0.99

RTH

0.985

RTH

1.01

RTH

1.015

RTH

HYST

Hysteresis Voltage (Note 7)

CC to Reset Delay

CC falling at 1 mV/µs

100

300

µs

Reset Timeout Period (Note 8)

1 =1nF

1.0

3.5

Reset Output Voltage Low

CC = 0.5V; IOL =30µA

0.1

CC = 1.0V; IOL = 100 µA

0.1

CC =VRTH −100 mV; IOL =4mA

0.4

External Pull-up Resistor

0.68

Ω

LEAK

Reset Output Leakage Current

0.15

µA

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device

beyond its operating conditions.

Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (Maximum Junction Temperature), θJA (Junction to

Ambient Thermal Resistance), and TA (Ambient Temperature). The maximum allowable power dissipation at any temperature is PDmax =(TJmax −TA)/ θJA or the

number given in the Absolute Maximum Ratings, whichever is lower.

Note 3: The Human Body Model is a 100 pF capacitor discharged through a 1.5 k

Ω resistor into each pin.

Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.

Note 5: Min. and Max. limits in standard typeface are 100% production tested at 25˚C. Min. and Max. limits in boldface are guaranteed through correlation using

Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).

Note 6: Factory-trimmed reset thresholds are available in 50 mV increments from 2.4V to 5.0V. Contact your National Semiconductor representative.

Note 7: VHYST affects the relation between VCC and Reset as shown in the timing diagram.

Note 8: tRP is programmable by varying the value of the external capacitor (C1) connected to pin SRT. The equation is: tRP =2000xC1 (C1 in µF and tRP in ms).

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