LMD18245 datasheet(3/18 Pages) NSC

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Electrical Characteristics (Note 2) (Continued)

The following specifications apply for V

CC = +42V, unless otherwise stated. Boldface limits apply over the operating tem-

perature range, −40˚C

≤ T

J ≤ +125˚C. All other limits apply for TA = TJ = 25˚C.

Symbol

Parameter

Conditions

Typical

Limit

Units

(Note 5)

(Limits)

DIGITAL-TO-ANALOG CONVERTER (DAC)

Resolution

Bits (min)

Monotonicity

Bits (min)

Total Unadjusted Error

0.125

0.25

LSB (max)

0.5

LSB (max)

Propagation Delay

REF

DAC REF Input Current

DAC REF = +5V

−0.5

µA

±10

µA (max)

COMPARATOR AND MONOSTABLE

Comparator High Output Level

6.27

Comparator Low Output Level

Comparator Output Current

Source

0.2

Sink

3.2

DELAY

Monostable Turn OFF Delay

(Note 8)

1.2

µs

2.0

µs (max)

PROTECTION AND PACKAGE THERMAL RESISTANCES

Undervoltage Lockout, V

V (min)

V (max)

JSD

Shutdown Temperature, T

155

˚C

Package Thermal Resistances

Junction-to-Case, TO-220

1.5

˚C/W

Junction-to-Ambient, TO-220

˚C/W

LOGIC INPUTS

Low Level Input Voltage

−0.1

V (min)

0.8

V (max)

High Level Input Voltage

V (min)

V (max)

Input Current

IN = 0V or 12V

±10

µA (max)

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device

outside the rated Operating Conditions.

Note 2: Unless otherwise stated, load currents are pulses with widths less than 2 ms and duty cycles less than 5%.

Note 3: The maximum allowable power dissipation at any ambient temperature is PMax = (125 − TA)/θJA, where 125˚C is the maximum junction temperature for op-

eration, TA is the ambient temperature in ˚C, and θJAis the junction-to-ambient thermal resistance in ˚C/W. Exceeding Pmax voids the Electrical Specifications by forc-

ing TJabove 125˚C. If the junction temperature exceeds 155˚C, internal circuitry disables the power bridge. When a heatsink is used, θJAis the sum of the

junction-to-case thermal resistance of the package,

θJC, and the case-to-ambient thermal resistance of the heatsink.

Note 4: ESD rating is based on the human body model of 100 pF discharged through a 1.5 k

Ω resistor. M1, M2, M3 and M4, pins 8, 7, 6 and 4 are protected to 800V.

Note 5: All limits are 100% production tested at 25˚C. Temperature extreme limits are guaranteed via correlation using accepted SQC (Statistical Quality Control)

methods. All limits are used to calculate AOQL (Average Outgoing Quality Level). Typicals are at TJ = 25˚C and represent the most likely parametric norm.

Note 6: Asymmetric turn OFF and ON delay times and switching times ensure a switch turns OFF before the other switch in the same half H-bridge begins to turn

ON (preventing momentary short circuits between the power supply and ground). The transitional period during which both switches are OFF is commonly referred

to as the dead band.

Note 7: (ILOAD,ISENSE) data points are taken for load currents of 0.5A, 1A, 2A and 3A. The current sense gain is specified as ISENSE/ILOAD for the 1A data point.

The current sense linearity is specified as the slope of the line between the 0.5A and 1A data points minus the slope of the line between the 2A and 3A data points

all divided by the slope of the line between the 0.5A and 1A data points.

Note 8: Turn OFF delay, tDELAY, is defined as the time from the voltage at the output of the current sense amplifier reaching the DAC output voltage to the lower

DMOS switch beginning to turn OFF. With VCC = 32V, DIRECTION high, and 200Ω connected between OUT1 and VCC, the voltage at RC is increased from 0V to

5V at 1.2V/µs, and tDELAY is measured as the time from the voltage at RC reaching 2V to the time the voltage at OUT 1 reaches 3V.

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