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LP3995 Datasheet(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
No. de pieza LP3995
Descripción Electrónicos  Micropower 150mA CMOS Voltage Regulator with Active Shutdown
PDF  14 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP3995 Datasheet(HTML) 5 Page - National Semiconductor (TI)

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Absolute Maximum Ratings
(Notes 3, 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Input Voltage (V
IN)
−0.3 to 6.5V
Output Voltage
−0.3 to (V
IN + 0.3V)
to 6.5V (max)
Enable Input Voltage
−0.3 to 6.5V
Junction Temperature
150˚C
Lead/Pad Temperature
(Note 5)
micro SMD
260˚C
LLP
235˚C
Storage Temperature
−65 to +150˚C
Continuous Power
Dissipation(Note 7)
Internally Limited
ESD (Note 9)
Human Body Model
2 kV
Machine Model
200V
Operating Ratings (Note 3)
Input Voltage (V
IN)
2.5 to 6.0V
Enable Input Voltage
0 to 6.0V
Junction Temperature
−40 to +125˚C
Ambient Temperature
Range(Note 7)
-40 to 85˚C
Thermal Properties(Note 8)
Junction to Ambient Thermal
Resistance
θ
JA (LLP pkg.)
88˚C/W
θ
JA (micro SMD pkg.)
255˚C/W
Electrical Characteristics
Unless otherwise noted, V
EN = 1.5, VIN =VOUT + 1.0V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF, cBP = 0.01 µF. Typical values
and limits appearing in normal type apply for T
J = 25˚C. Limits appearing in boldface type apply over the full temperature
range for operation, −40 to +125˚C. (Notes 14, 15)
Symbol
Parameter
Conditions
Typical
Limit
Units
Min
Max
V
IN
Input Voltage
2.5
6.0
V
DEVICE OUTPUT: 1.5
≤ V
OUT < 1.8V
∆V
OUT
Output Voltage Tolerance
I
OUT = 1 mA
-50
50
mV
-75
75
Line Regulation Error
V
IN =(VOUT(NOM)+1.0V) to 6.0V,
I
OUT =1mA
-3.5
3.5
mV/V
micro SMD
Load Regulation Error
I
OUT =1mAto150 mA
10
75
µV/mA
LLP
Load Regulation Error
I
OUT =1mAto150 mA
70
125
µV/mA
PSRR
Power Supply Rejection Ratio
(Note 11)
f = 1 kHz, I
OUT =1mA
55
dB
f = 10 kHz, I
OUT =1mA
53
DEVICE OUTPUT: 1.8
≤ V
OUT < 2.5V
∆V
OUT
Output Voltage Tolerance
I
OUT = 1 mA
-50
50
mV
−75
75
microSMDLine Regulation Error
V
IN =(VOUT(NOM)+1.0V) to 6.0V,
I
OUT =1mA
−2.5
2.5
mV/V
LLP
Line Regulation Error
V
IN =(VOUT(NOM)+1.0V) to 6.0V,
I
OUT =1mA
−3.5
3.5
mV/V
micro SMD
Load Regulation Error
I
OUT =1mAto150 mA
10
75
µV/mA
LLP
Load Regulation Error
I
OUT =1mAto150 mA
80
125
µV/mA
PSRR
Power Supply Rejection Ratio
(Note 11)
f = 1 kHz, I
OUT =1mA
55
dB
f = 10 kHz, I
OUT =1mA
50
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