13

Single Ended

S08P

30.0

1.6

60.0

2.50 C/W

65

1.6

10.00

2.0

55

0.65

8.00

4.5

60

0.20

70

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS TEST CONDITIONS

Common Source Power Gain

Drain Efficiency

Total

Device

Dissipation

Junction to

Case Thermal

Resistance

Maximum

Junction

Temperature

Storage

Temperature

DC Drain

Current

Drain to

Source

Voltage

Gate to

Source

Voltage

-65 C to 150 C

C

A

V

Load Mismatch Tolerance

VSWR

Drain to

Gate

Voltage

Relative

0.40

0.20

Ids =

mA, Vgs = 0V

V, Vgs = 0V

Ciss

Crss

Coss

Vds =

Idq =

A, Vds =

V, F =

0.40

Bvdss

Idss

Drain Breakdown Voltage

V

mA

pF

pF

pF

Common Source Output Capacitance

Common Source Feedback Capacitance

Idq =

Idq = 0.40

500

Vgs =

Rdson

Saturation Resistance

Forward Transconductance

gM

Vds = 10V, Vgs = 5V

POLYFET RF DEVICES

1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:contact@polyfet.com URL:www.polyfet.com

500

500

Common Source Input Capacitance

70

V

Igss

Vgs

Idsat

Zero Bias Drain Current

Gate Leakage Current

Gate Bias for Drain Current

Saturation Current

25

uA

V

Mho

Ohm

Amp

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS TEST CONDITIONS

ELECTRICAL CHARACTERISTICS ( EACH SIDE )

RF CHARACTERISTICS (

30.0

ABSOLUTE MAXIMUM RATINGS ( T =

Gps

28.0

A, Vds =

V, F =

A, Vds =

V, F =

28.0

28.0

Watts

V

1

MHz

MHz

MHz

Watts

Package Style

30.0

Vds = 0V Vgs = 10V

HIGH EFFICIENCY, LINEAR

HIGH GAIN, LOW NOISE

General Description

28.0

Vds =

A, Vgs = Vds

Ids =

A



dB

%

o

o

o

o

o

SILICON GATE ENHANCEMENT MODE

RF POWER

TRANSISTOR

LDMOS

Vgs = 0V, F = 1 MHz

28.0

Vds =

Vgs = 0V, F = 1 MHz

28.0

Vds =

Vgs = 0V, F = 1 MHz

28.0

REVISION 02/25/2016

20

25 C )

WATTS OUTPUT )

150

polyfet rf devices

L8701PR

10:1

ROHS COMPLIANT

Silicon LDMOS transistor designed

specifically for Broadband RF

applications. Suitable for Military

Radios, Cellular Base Staions,

Broadcast FM/AM, MRI, Laser Drivers

and others.

"Polyfet" process features low

feedback and output capacitances,

resulting in high Ft transistors with

high input impedance and high

efficiency.

+

V, Ids =

20

V, Vds = 10V

Vgs = 20

0

-

V