LoRa/BLE Modules

Datasheet

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UART_TX, UART_RX, UART_RTS, and UART_CTS form a conventional asynchronous serial data port with

handshaking. The interface is designed to operate correctly when connected to other UART devices such as the

16550A. The signaling levels are CMOS logic levels that track VCC, and are inverted with respect to the signaling

on an RS232 cable.

Two-way hardware flow control is implemented by UART_RTS and UART_CTS. UART_RTS is an output and

UART_CTS is an input. Both are active low.

These signals operate according to normal industry convention. UART_RX, UART_TX, UART_CTS, UART_RTS are

all CMOS logic levels that track VCC. For example, when RX and TX are idle they sit at a high logic level (VCC).

Conversely for handshaking pins CTS, RTS at 0 V is treated as an assertion.

The module communicates with the customer application using the following signals (Figure 6):



Port /TXD of the application sends data to the module’s UART_RX signal line



Port /RXD of the application receives data from the module’s UART_TX signal line

Figure 6: UART Signals

Note:

The RM1xx serial module output is at CMOS logic levels that track VCC. Level conversion must be

added to interface to provide an RS-232 level compliant interface.

Some serial implementations link CTS and RTS to remove the need for handshaking. Laird does not recommend

linking CTS and RTS other than for testing and prototyping. If these pins are linked and the host sends data at the

point that the RM1xx deasserts its RTS signal, then there is significant risk that internal receive buffers will

overflow, which could lead to an internal processor crash. This will drop the connection and may require a

power cycle to reset the module. Laird recommends that the correct CTS/RTS handshaking protocol be adhered

to for proper operation.

Table 16: UART Interface

Signal Name

Pin #

I/O Comments

SIO_21/UART_TX

2

O

SIO_21 (alternative function UART_TX) is an output, set high (in FW).

SIO_22/UART_RX

3

I

SIO_22 (alternative function UART_RX) is an input, set with internal pull-

up (in FW).

SIO_23/UART_RTS

4

O

SIO_23 (alternative function UART_RTS) is an output, set low (in FW).

SIO_24/UART_CTS

5

I

SIO_24 (alternative function UART_CTS) is an input, set with internal pull-

down (in FW).

The UART interface is also used to load customer developed smartBASIC application script.

4.5

SPI Bus

The SPI interface is an alternate function on SIO pins, configurable by smartBASIC.

The module is a master device that uses terminals SPI_MOSI, SPI_MISO, and SPI_CLK. SPI_CSB is implemented

using any spare SIO digital output pins to allow for multi-dropping.