WM9713 datasheet(28/111 Pages) WOLFSON

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WM9713L

Preliminary Technical Data

PTD, March 2004, Rev 2.2

AUDIO ADCS

STEREO ADC

The WM9713L has a stereo sigma-delta ADC to digitize audio signals. The ADC achieves high

quality audio recording at low power consumption. The ADC sample rate can be controlled by writing

to a control register (see “Variable Rate Audio”). It is independent of the DAC sample rate.

To save power, the left and right ADCs can be separately switched off using the Powerdown bits

ADCL and ADCR (register 3Ch, bits 5:4), whereas PR0 disables both ADCs (see “Power

Management” section). If only one ADC is running, the same ADC data appears on both the left and

right AC-Link slots.

The output from the ADC can be sent over either the AC link as usual, or output via the PCM

interface which may be configured on the GPIO pins.

HIGH PASS FILTER

The WM9713L audio ADC incorporates a digital high pass filter that eliminates any DC bias from the

ADC output data. The filter is enabled by default. For DC measurements, it can be disabled by

writing a ‘1’ to the HPF bit (register 5Ch, bit 3).

This high pass filter corner frequency can be selected to have different values in WM9713L, to suit

applications such as voice where a higher cutoff frequency is required.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

5Ah

5:4

HPMODE

HPF corner frequency

00: 7Hz @ Fs=48kHz

01: 82Hz @ Fs=16kHz

10: 82Hz @ Fs=8kHz

11: 170Hz @ Fs=8kHz

Note: the filter corner frequency is proportional to the sample rate.

Table 8 ADC Highpass Filter Frequency Control

ADC SLOT MAPPING

By default, the output of the left audio ADC appears on slot 3 of the SDATAIN signal (pin 8), and the

right ADC data appears on slot 4. However, the ADC output data can also be sent to other slots, by

setting the ASS (ADC slot select) control bits as shown below.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

1:0

ASS

ADC to slot mapping

00: Left = Slot 3, Right = Slot 4 (default)

01: Left = Slot 7, Right = Slot 8

10: Left = Slot 6, Right = Slot 9

11: Left = Slot 10, Right = Slot 11

5Ch

Additional

Functions

(2)

HPF

High-pass filter disable

0: Filter enabled (for audio)

1: Filter disabled (for DC measurements)

Table 9 ADC Control

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