P9038-RNDGI datasheet(12/18 Pages) IDT

12 / 18 page

P9038 DATASHEET

P9038 August 1, 2016

System Overview

For complete details of the WPC wireless power systems,

refer to the WPC specifications and other materials at

http://www.wirelesspowerconsortium.com.

The P9038 requires a minimum number of external

components for proper operation. The provided reference

design schematic and Bill-of-Materials component list enable

a fully WPC "Qi Compliant" system. In addition to providing

required LED indications, this system also provides optional

buzzer indications (that could be used with an external

piezoelectric buzzer device), and an thermistor

over-temperature limit function and optional buzzer

indications that are available to drive an external

piezeoelectric buzzer device.

I2C Communication

The P9038 includes an I2C block which can support either I2C

Master or I2C Slave operation. After power-on-reset (POR),

the P9038 will initially acts as an I2C Master for the purpose of

downloading firmware from an external memory device, such

as an EEPROM. The I2C Master mode on the P9038 does not

support multi-master mode, and it is important for system

designers to avoid any bus master conflict until the P9038 has

finished any firmware uploading and has released control of

the bus as I2C Master. After firmware downloaded from

external memory is complete, and when the P9038 begins

normal operation, the P9038 is configured by the standard

firmware to be exclusively in I2C Slave mode.

For maximum flexibility, the P9038 tries to communicate with

the first address on the EEPROM at 300kHz. If no

acknowledge bit (ACK) is received, communication is

attempted at the other addresses at 100kHz. If no EEPROM

is present in the system, the P9038 will attempt to execute

firmware from its internal ROM memory.

EEPROM

The P9038 EVK supports an external EEPROM memory chip,

pre-programmed with a standard operating firmware that is

automatically loaded when 5V power is applied. The P9038

uses I2C master address 0x52 to access the EEPROM. The

P9038 slave address is 0x39.

If the standard firmware is not suitable for the application,

custom EEPROM or internal factory programmed ROM

configurations are possible. Please contact IDT Sales for

more information regarding non-standard solution options.

Overview of Standard GPIO Usage

There are 7 GPIO's on the P9038 transmitter IC. All GPIOs

are configured as inputs during the power-on startup process.

Firmware will then reconfigure the GPIO as follows:

• GPIO-0: This pin is not used in the standard firmware and

is configured as active-low output during normal operation.

• GPIO-1: This pin is used to dynamically manage the

optimum configuration of the external communication

demodulation circuit.

• GPIO-2: This pin is connected to an external thermistor

circuit which is used by P9038 to determine an external

over-temperature condition

• GPIO-3: During power-on, this pin is sampled by the

internal ADC to determine the resistor option setting for the

LED mode. In normal operation, this pin is configured as an

output to drive the Green LED indication functions (see

Table 10).

• GPIO-4: During power-on, this pin is sampled by the

internal ADC to determine the resistor option setting for

adjusting the FOD offset value. In normal operation, this pin

is configured as an output to drive the optional external

piezoelectric buzzer function.

• GPIO-5: This pin is configured as an output to indicate the

result of the USB D+/D- port type detection. If the USB port

type is a Charger Port, then the output will be set to

active-high. Otherwise, the output is set to active-low

• GPIO-6: This pin is configured as an output to drive the

Red LED functions (see Table 7).

Table 7 lists how the red and green LEDs can be used to

display information about the P9038's operating modes. This

table also specifies how to configure the GPIO-3 optioning

resistors to select the desired LED mode.

P9038-RNDGI Datasheet(PDF) 12 Page - Integrated Device Technology

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