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ICS950910 Datasheet(PDF) 1 Page - Integrated Circuit Systems

No. de pieza ICS950910
Descripción Electrónicos  Programmable Timing Control Hub for P4
PDF  20 Pages
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Fabricante Electrónico  ICST [Integrated Circuit Systems]
Página de inicio  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS950910 Datasheet(HTML) 1 Page - Integrated Circuit Systems

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Integrated
Circuit
Systems, Inc.
ICS950910
0735A—03/18/04
Pin Configuration
Recommended Application:
VIA P4X/P4M/KT/KN266/333 style chipsets.
Output Features:
1 - Pair of differential CPU clocks @ 3.3V (CK408)/
1 - Pair of differential open drain CPU clocks (K7)
1 - Pair of differential push pull CPU_CS clocks @ 2.5V
3 - AGP @ 3.3V
7 - PCI @ 3.3V
1 - 48MHz @ 3.3V fixed
1 - 24_48MHz @ 3.3V
2 - REF @ 3.3V, 14.318MHz
Key Specifications:
CPU_CS - CPUT/C: <±250ps
CPU_CS - AGP: <±250ps
CPU - DDR: <±250ps
PCI - PCI: <500ps
CPU - PCI: Min = 1.0ns, Typ = 2.0ns, Max = 4.0ns
Programmable Timing Control Hub™ for P4™
Frequency Table
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5
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4
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0
Bit7
Bit6
Bit5
Bit4
CPU
AGP
PCI
Spread %
Bit2
FS3
FS2
FS1
FS0
MHz
MHz
MHz
1
0
0
0
0
105.00
70.00
35.00
0.3 % Center Spread
1
0
0
0
1
140.00
70.00
35.00
0.3 % Center Spread
1
0
0
1
0
210.00
70.00
35.00
0.3 % Center Spread
1
0
0
1
1
174.99
70.00
35.00
0.3 % Center Spread
1
0
1
0
0
80.00
53.34
26.66
0.3 % Center Spread
1
0
1
0
1
106.66
53.34
26.66
0.3 % Center Spread
1
0
1
1
0
160.00
53.34
26.66
0.3 % Center Spread
1
0
1
1
1
133.33
53.34
26.66
0.3 % Center Spread
1
1
1
0
0
100.00
66.67
33.33
0.3 % Center Spread
1
1
1
0
1
133.33
66.67
33.33
0.3 % Center Spread
1
1
1
1
0
200.00
66.67
33.33
0.3 % Center Spread
1
1
1
1
1
166.66
66.67
33.33
0.3 % Center Spread
1
1
0
0
0
100.00
66.67
33.33
0 - 0.6% Down Spread
1
1
0
0
1
133.33
66.67
33.33
0 - 0.6% Down Spread
1
1
0
1
0
200.00
66.67
33.33
0 - 0.6% Down Spread
1
1
0
1
1
166.66
66.67
33.33
0 - 0.6% Down Spread
*FS0/REF0 1
56 Vtt_PWRGD#**/REF1
GND 2
55 VDDREF
X1 3
54 GND
X2 4
53 CPUCLKT/CPUCLKODT
VDDAGP 5
52 CPUCLKC/CPUCLKODC
*MODE/AGPCLK0 6
51 VDDCPU3.3
*SEL_408/K7/AGPCLK1 7
50 VDDCPU2.5
*(PCI_STOP#)AGPCLK2 8
49 CPUC_CS
GNDAGP 9
48 CPUT_CS
**FS1/PCICLK_F 10
47 GND
***PCICLK1 11
46 FBOUT
*MULTSEL/PCICLK2 12
45 BUF_IN
GNDPCI 13
44 DDRT0
PCICLK314
43DDRC0
PCICLK415
42DDRT1
VDDPCI 16
41 DDRC1
PCICLK517
40VDD2.5
*(CLK_STOP#)PCICLK6 18
39 GND
GND48 19
38 DDRT2
*FS3/48MHz 20
37 DDRC2
*FS2/24_48MHz 21
36 DDRT3
AVDD48 22
35 DDRC3
VDD 23
34 VDD2.5
GND 24
33 GND
IREF 25
32 DDRT4
*(PD#)RESET# 26
31 DDRC4
SCLK 27
30 DDRT5
SDATA 28
29 DDRC5
56-SSOP
* Internal Pull-Up Resistor
** Internal Pull-Down Resistor
*** A 120k pull-down resistor to GND is needed on this pin.
Features/Benefits:
Programmable output frequency.
Programmable output divider ratios.
Programmable output rise/fall time.
Programmable output skew.
Programmable spread percentage for EMI control.
DDR output buffer supports up to 200MHz.
Watchdog timer technology to reset system
if system malfunctions.
Programmable watch dog safe frequency.
Support I
2C Index read/write and block read/write
operations.
Uses external 14.318MHz crystal.


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