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P89682K Datasheet(PDF) 21 Page - Aplus Intergrated Circuits

No. de pieza P89682K
Descripción Electrónicos  VOICE OTP IC
PDF  44 Pages
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Fabricante Electrónico  APLUS [Aplus Intergrated Circuits]
Página de inicio  http://www.aplusinc.com.tw
Logo APLUS - Aplus Intergrated Circuits

P89682K Datasheet(HTML) 21 Page - Aplus Intergrated Circuits

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Integrated Circuits Inc.
aP89682K/341K/170K/085K
Ver 2.5.1
21
May 24 2016
I2C Command Timing Diagram:
Fig.19 I2C Command timing
* The data bit only can be changed in SCK low level , but it has to be latched before rising edge
of SCK.
* I2C Command function reference Fig. 8 CPU Serial Command Description.
Power up with RAMP-UP(PU2) or without RAMP-UP(PU1)
Fig. 20 Power-Up command timing
* Ramp up time : 160mS
Add stop condition after power on and internal chip configuration time finish.
In Power up command : After start condition signal, add delay time more than 300us to wake up device.
Power-down with RAMP-DOWN(PD2) or without RAMP-DOWN (PD1)
Fig. 21 Power-Down command timing
* Ramp down time : 160mS



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