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PC87310 Datasheet(PDF) 48 Page - National Semiconductor (TI) |
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PC87310 Datasheet(HTML) 48 Page - National Semiconductor (TI) |
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48 / 52 page ![]() 70 AC Electrical Characteristics All timings are referenced to valid 0 and valid 1 (Continued) RECEIVER Symbol Parameter Conditions Min Max Units tRAI Delay from Active Edge of RD 98 ns to Reset Interrupt tRINT Delay from Inactive Edge of RD 60 ns (RD LSR) to Reset Interrupt tSCD Delay from RCLK (Note 1) 41 ns to Sample Time tSINT Delay from Stop to Set Interrupt 2 BAUDOUT Cycles Note 1 This is an internal timing and therefore is not tested Receiver Timing TLC10591 – 27 48 |
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