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VDP313XY Datasheet(PDF) 31 Page - Micronas

No. de pieza VDP313XY
Descripción Electrónicos  Video Processor Family
PDF  76 Pages
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Fabricante Electrónico  MICRONAS [Micronas]
Página de inicio  http://www.micronas.com
Logo MICRONAS - Micronas

VDP313XY Datasheet(HTML) 31 Page - Micronas

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ADVANCE INFORMATION
VDP 313xY
Micronas
31
Miscellaneous
29
16
w/r
Test pattern generator:
bit[10:0]
reserved (set to 0)
bit[11]
0/1
disable/enable test
pattern generator
bit[13:12]
output mode:
00
Y/C = ramp (240 ... 17)
01
Y/C = 16
10
Y/C = 90
11
Y/C = 240
bit[15:14] 0/1
reserved (set to 0)
0
0
0
0
TPG
TPGEN
TPGMODE
22
16
w/r
NEWLINE
(available for versions with panorama scaler only):
bit[10:0]
NEWLINE register
This register defines the readout
start of the next line in respect to
the value of the sync counter.
Value of this register must be
greater than 31 for correct
operation.
bit[15:11]
reserved (set to 0)
50
NEWLIN
Table 2–4: I2C control and status registers of the video frontend
I2C Sub
address
Number
of bits
Mode
Function
Default
Name
(hex)
(hex)



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