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TSM115 Datasheet(PDF) 15 Page - STMicroelectronics |
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TSM115 Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 17 page ![]() Electrical Characteristics TSM115 15/17 TSM115: Housekeeping IC TSM115 is a one chip solution for all PC SMPS: it integrates on one chip the Housekeeping Circuitry (Over and under voltage and over current protections, with adequate sequencing). Multiple Power Line Protection The TSM115 Housekeeping Circuit is dedicated to 3.3V, 5V and ±12V power lines protection. It integrates a multiple Over and under Voltage Protection Circuit and a multiple over current Protection Circuit as well as all the necessary logic and transient timing management circuits for optimal and secure communication with the motherboard, during start up, switch off and stabilized conditions. Over Voltage Protection The Over Voltage Protection Circuit is made of comparators with internal voltage thresholds which do not require any external components for proper operation. The outputs of these comparators are ORed. Under Voltage Protection The Under Voltage Protection Circuit is made of comparators with internal voltage thresholds which do not require any external components for proper operation. The outputs of these comparators are ORed, and blanked by an internal delay circuitry (Power Up Blanking - Tuv) which can be adjusted with an external capacitor (Cuv). This allows that during power up, the under voltage protection circuit is inhibited. Over Current Protection The Over current Protection Circuit is made of comparators with external thresholds which can be adjusted by changing a resistor. The outputs of these comparators are ORed. FAULT The Over Voltage and Under Voltage Circuits outputs are ORed before activating a latch. When activated, this latch commands the full switch OFF of the main power lines (3.3V, 5V, 12V) by an external link between the housekeeping and the primary PWM circuits via the main optocoupler or any other device. Power Good The Under Voltage Circuits are Ored to switch the Power Good output active (PG) to warn the motherboard that the voltage of at least one of the three power lines is out of range. The PG activation bears an internal Tpg delay circuitry which can be adjusted with an external capacitor (Cpg). Remote Control The remote control information from the mother board, enters via the Remote pin (REM) to activate an internal latch. When the Remote pin is active, the external Fault link between Housekeeping circuit and the PWM generator is active (high = PWM OFF) and the PG pin is active (high). Note that to reset effectively the latch, a minimum width Remote pulse should be applied thanks to an internal delay circuitry (Trem) which can be adjusted with an external capacitor (Crem). |
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