ML7406 datasheet(19/104 Pages) LAPIS

No. de pieza	ML7406

Descripción Electrónicos	868MHz SRD RF transceiver IC

PDF	104 Pages

Scroll/Zoom	100%

Fabricante Electrónico	LAPIS [LAPIS Semiconductor Co., Ltd.]

Página de inicio	http://www.lapis-semi.com/

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19 / 104 page

FEDL7406-02

ML7406

19/104

■Functional Description

●Host Interface

○Serial Peripheral Interface (SPI)

ML7406 has a SPI, which supports slave mode. Host MCU can read/write to the ML7406 registers and on-chip FIFO using

MCU clock. Single access mode and burst access mode are also supported.

[Single access mode timing chart]

In write operation, data will be stored into internal register at rising edge of clock which is capturing D0 dat. During write

operation, if setting SCEN line to “H”, the data will not be stored into register. For more details of SCEN invert perios, please

refer to the “SPI interface characteristics”. After the internal clock is stabilized, the data will be written into the register in

synchronization with the internal clcok.

SCEN

SDI

SCLK

Write data field

Address field

SCEN

SDI

SCLK

Address field

SDO

Data read field

[Write]

[Read]

(Register write timing)

Before clock stable

After clock stable

D7-0

“1”

“0”

Up to 0.45 µs

ML7406 Datasheet(PDF) 19 Page - LAPIS Semiconductor Co., Ltd.