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ST72561AR6 Datasheet(PDF) 28 Page - STMicroelectronics

No. de pieza ST72561AR6
Descripción Electrónicos  8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI , ACTIVE CAN
PDF  262 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561AR6 Datasheet(HTML) 28 Page - STMicroelectronics

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SYSTEM INTEGRITY MANAGEMENT (Cont’d)
6.4.3 Low Power Modes
6.4.3.1 Interrupts
The AVD interrupt event generates an interrupt if
the AVDIE bit is set and the interrupt mask in the
CC register is reset (RIM instruction).
Mode
Description
WAIT
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
HALT
The SICSR register is frozen.
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
AVD event
AVDF
AVDIE
Yes
No



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