GND

S/D

1

2

3

4

8

7

6

5

GND

N/C

GND

LP3882

SNVS226F – MARCH 2003 – REVISED APRIL 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

CONNECTION DIAGRAM

Figure 1. 5-Pin TO-220, Top View

Figure 2. 5-Pin DDPAK/TO-263, Top View

See NDH0005D Package

See KTT0005B Package

Figure 3. 8-Pin SO PowerPad, Top View

See DDA0008D Package

White Space

White Space

White Space

BLOCK DIAGRAM

2

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