| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
ADN2913 Datasheet(PDF) 18 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADN2913 Datasheet(HTML) 18 Page - Analog Devices |
|
18 / 37 page ![]() ADN2913 Data Sheet Rev. A | Page 18 of 37 Table 18. Output Control Register, OUTPUTA (Address 0x1E) Bits Bit Name Bit Description D7:D6 Reserved to 0 D5 Data squelch Squelch 0 = normal data 1 = squelch data D4 DATOUT_DISABLE Data output disable 0 = data output enabled 1 = data output disabled D3 CLKOUT_DISABLE Clock output disable 0 = clock output enabled 1 = clock output disabled D2 DDR_DISABLE Double data rate 0 = DDR clock enabled 1 = DDR clock disabled D1 DATA_POLARITY Data polarity 0 = normal data polarity 1 = flip data polarity D0 CLOCK_POLARITY Clock polarity 0 = normal clock polarity 1 = flip clock polarity |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |