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PI6CFGL401B Datasheet(PDF) 9 Page - Pericom Semiconductor Corporation |
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PI6CFGL401B Datasheet(HTML) 9 Page - Pericom Semiconductor Corporation |
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9 / 14 page ![]() 9 www.pericom.com 06/05/15 All trademarks are property of their respective owners. PI6CFGL401B 4-Output Low Power PCIE Gen 1-2-3 Clock Generator Serial Data Interface (SMBus) This part is a slave only device that supports blocks read and block write protocol using a single 7-bit address and read/write bit as shown below. Read and write block transfers can be stopped after any complete byte transfer by issuing STOP. Address Assignment Refer to SMBus Address Selection Table. Data Protocol (Write) 1 bit 8 bits 1 8 bits 1 8 bits 1 8 bits 1 8 bits 1 1 bit Start bit Slave Addr: D4 Ack Register offset Ack Byte Count=N Ack Data Byte 0 Ack … Data Byte N-1 Ack Stop bit (Read) 1 bit 8 bits 1 8 bits 1 1 8 bits 1 8 bits 1 8 bits 1 8 bits 1 1 bit Start bit Slave Addr: D4 Ack Register offset Ack Repeat start Slave Addr: D5 Ack Byte Count=N Ack Data Byte 0 Ack … Data Byte N-1 NOT Ack Stop bit Note: 1.Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0. 15-0072 |
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