6

Date: 08/24/04

SP7650 Wide Input Voltage Range 3A, 300kHz, Buck Regulator

© Copyright 2004 Sipex Corporation

THEORY OF OPERATION

zero response is desired, then compensation can

be as simple as an RC to ground. If a more

complex compensation is required, then the

amplifier has enough bandwidth (45

° at 4 MHz)

and enough gain (60dB) to run Type III compen-

sation schemes with adequate gain and phase

margins at cross over frequencies greater than

50kHz.

The common mode output of the error amplifier

is 0.9V to 2.2V. Therefore, the PWM voltage

ramp has been set between 1.1V and 2.2V to

ensure proper 0% to 100% duty cycle capability.

The voltage loop also includes two other very

important features. One is an asynchronous start

up mode. Basically, the synchronous rectifier

can not turn on unless the high side switch has

attempted to turn on or the SS pin has exceeded

1.7V. This feature prevents the controller from

“dragging down” the output voltage during

startup or in fault modes. The second feature is

a 100% duty cycle timeout that ensures synchro-

nized refreshing of the BST capacitor at very

high duty ratios. In the event that the high side

NFET is on for 20 continuous clock cycles, a

reset is given to the PWM flip flop half way

through the 21st cycle. This forces GL to rise for

the cycle, in turn refreshing the BST capacitor.

The boost capacitor is used to generate a high

voltage drive supply for the high side switch,

Power MOSFETs

The SP7650 contains a pair of integrated low

resistance N-channel switches designed to drive

up to 3A of output current. Care should be taken

to de-rate the output current based on the ther-

mal conditions in the system such as ambient

temperature, airflow and heat sinking. Maxi-

mum output current could be limited by thermal

limitations of a particular application by taking

advantage of the integrated over temperature

protective scheme employed in the SP7650.

The SP7650 incorporates a built-in over-tem-

perature protection to prevent internal overheat-

ing.

GH

Voltage

GL

Voltage

V(VIN)

0V

-0V

-V(Diode) V

V(VIN)+V(VCC)

BST

Voltage

V(VCC)

TIME

SWN

Voltage

VBST

VSWN

V(VCC)

The SP7650 can be set to different output

voltages. The relationship in the following

formula is based on a voltage divider from the

output to the feedback pin VFB, which is set

to an internal reference voltage of 0.80V.

Standard 1% metal film resistors of surface

mount size 0603 are recommended.

Vout = 0.80V ( R1 / R2 + 1 ) => R2 = R1 / [ (

Vout / 0.80V ) – 1 ]

Where R1 = 68.1K

Ω and for Vout = 0.80V

setting, simply remove R2 from the board.

Furthermore, one could select the value of R1

and R2 combination to meet the exact output

voltage setting by restricting R1 resistance

range such that 50K

Ω < R1 < 100KΩ for

overall system loop stability.

Setting Output Voltages