AD8284WCSVZ datasheet(6/28 Pages) AD

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AD8284

Data Sheet

Rev. D | Page 6 of 28

SWITCHING SPECIFICATIONS

AVDD18x = 1.8 V, AVDD33x = 3.3 V, DVDD18x = 1.8 V, DVDD33x = 3.3 V, 1.00 V internal ADC reference, fIN = 2.5 MHz, fS = 60 MSPS,

RS = 50 Ω, LNA + PGA gain = 35 dB, LPF cutoff = fSAMPLECH/4, 12-bit operation, temperature = −40°C to +105°C, unless otherwise noted. All

specifications guaranteed by design only.

Table 4.

Parameter1

Symbol

Temperature

Min

Typ

Max

Unit

CLOCK

Clock Rate

Full

MSPS

Clock Pulse Width High at 60 MSPS

tEH

Full

8.33

Clock Pulse Width Low at 60 MSPS

tEL

Full

8.33

Clock Pulse Width High at 40 MSPS

tEH

Full

12.5

Clock Pulse Width Low at 40 MSPS

tEL

Full

12.5

OUTPUT PARAMETERS

Propagation Delay at 60 MSPS

tPD

Full

Rise Time

Full

1.9

Fall Time

Full

1.2

Data Setup Time at 60 MSPS

tDS

Full

8.33

Data Hold Time at 60 MSPS

tDH

Full

6.0

Data Setup Time at 40 MSPS

tDS

Full

Data Hold Time at 40 MSPS

tDH

Full

Pipeline Latency

Full

Clock cycles

1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and testing methodology.

Timing and Switching Diagram

Figure 2. Timing Definitions for Switching Specifications

N –1

INAx

N – 7

N – 6

N – 5

N – 4

N – 3

N – 2

N – 1

CLK–

CLK+

D11 to D0

tPD

tEH

tEL

tDS

tDH

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