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54F181DM Datasheet(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza 54F181DM
Descripción Electrónicos  4-Bit Arithmetic Logic Unit
PDF  10 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

54F181DM Datasheet(HTML) 3 Page - National Semiconductor (TI)

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’F181 Operation Table
Logic
Arithmetic
Arithmetic
S0
S1
S2
S3
(MeH)
(MeL C0eInactive)
(MeL C0eActive)
LLLL
A
A minus 1
A
HL
L
L
A
 B
A
 B minus 1
A
 B
LHL
L
A a BA
 B minus 1
A
 B
H
H
L
L
Logic ‘‘1’’
minus 1 (2s comp)
Zero
LL
H
L
A a B
A plus (A a B)
A plus (A a B) plus 1
HLHL
B
A
 B plus (A a B)A  B plus (A a B) plus 1
LH
HL
A Z B
A minus B minus 1
A minus B
HHH
L
A a B
A a B
A a B plus 1
LLL
H
A
 B
A plus (A a B)
A plus (A a B plus 1
HL
LH
A Z B
A plus B
A plus B plus 1
LHLH
B
A
 B plus (A a B)
A
 B plus (A a B) plus 1
HH
L
H
A a BA a BA a B plus 1
L
L
H
H
Logic ‘‘0’’
A plus A (2 c A)
A plus A (2 c A) plus 1
HLH
H
A
 B
A plus A
 B
A plus A
 B plus 1
LH
H
H
A
 B
A plus A
 B
A plus A
 B plus 1
H
H
H
H
A
A
A plus 1
LLLL
A
A
A plus 1
HL
L
L
A a B
A a BA a B plus 1
LHL
L
A
 BA a B
A a B plus 1
H
H
L
L
Logic ‘‘0’’
minus 1 (2s comp)
Zero
LL
H
L
A
 B
A plus (A
 B)
A plus A
 B plus 1
HLHL
B
A
 B plus (A a B)
A
 B plus (A a B) plus 1
LH
HL
A Z B
A minus B minus 1
A minus B
HHH
L
A
 B
A
 B minus 1
A
 B
LLL
H
A a B
A plus A
 B
A plus A
 B plus 1
HL
LH
A Z B
A plus B
A plus B plus 1
LHLH
B
A
 B plus (A a B)A  B plus (A a B) plus 1
HH
L
H
A
 BA  B minus 1
A
 B
L
L
H
H
Logic ‘‘1’’
A plus A (2 c A)
A plus A (2 c A) plus 1
HLH
H
A a B
A plus (A aB)
A plus (AaB) plus 1
LH
H
H
A a B
A plus (A a B)
A plus (AaB) plus 1
H
H
H
H
A
A minus 1
A
LLLL
A
A minus 1
A
HL
L
L
A a BA
 B minus 1
A
 B
LHL
L
A
 B
A
 B minus 1
A
 B
H
H
L
L
Logic ‘‘1’’
minus 1 (2s comp)
Zero
LL
H
L
A
 B
A plus (A a B)
A plus (A a B) plus 1
HLHL
B
A
 B plus (A a B)
A
 B plus (A a B) plus 1
LH
HL
A Z B
A plus B
A plus B plus 1
HHH
L
A a BA a BA a B plus 1
LLL
H
A a B
A plus (A a B)
A plus (A a B) plus 1
HL
LH
A Z B
A minus B minus 1
A minus B
LHLH
B
A
 B plus (A a B)A  B plus (A a B) plus 1
HH
L
H
A a B
A a B
A a B plus 1
L
L
H
H
Logic ‘‘0’’
A plus A (2 c A)
A plus A (2 c A) plus 1
HLH
H
A
 B
A plus A
 B
A plus A
 B plus 1
LH
H
H
A
 B
A plus A
 B
A plus A
 B plus 1
H
H
H
H
A
A
A plus 1
LLLL
A
A
A plus 1
HL
L
L
A
 BA a B
A a B plus 1
LHL
L
A a B
A a BA a B plus 1
H
H
L
L
Logic ‘‘0’’
minus 1 (2s comp)
Zero
LL
H
L
A a B
A plus A
 B
A plus A
 B plus 1
HLHL
B
A
 B plus (A a B)A  B plus (A a B) plus 1
LH
HL
A Z B
A plus B
A plus B plus 1
HHH
L
A
 BA  B minus 1
A
 B
LLL
H
A
 B
A plus A
 B
A plus A
 B plus 1
HL
LH
A Z B
A minus B minus 1
A minus B
LHLH
B
A
 B plus (A a B)
A
 B plus (A a B) plus 1
HH
L
H
A
 B
A
 B minus 1
A
 B
L
L
H
H
Logic ‘‘1’’
A plus A (2 c A)
A plus A (2 c A) plus 1
HLH
H
A a B
A plus (A aB)
A plus (AaB) plus 1
LH
H
H
A a B
A plus (A a B)
A plus (AaB) plus 1
H
H
H
H
A
A minus 1
A
a All Input Data Inverted
b All Input Data True
c A Input Data Inverted
B Input Data True
d A Input Data True
B Input Date Inverted
3



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