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STM32F756VG Datasheet(PDF) 140 Page - STMicroelectronics

No. de pieza STM32F756VG
Descripción Electrónicos  Up to 25 communication interfaces
PDF  228 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F756VG Datasheet(HTML) 140 Page - STMicroelectronics

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Electrical characteristics
STM32F756xx
140/228
DocID027589 Rev 4
VIH
FT, TTa and NRST I/O input
high level voltage(5)
1.7 VVDD3.6 V
0.45VDD+0.3(1)
--
V
0.7VDD(2)
BOOT I/O input high level
voltage
1.75 VVDD 3.6 V, –
40 °CTA 105 °C
0.17VDD+0.7(1)
--
1.7 VVDD 3.6 V,
0 °CTA 105 °C
VHYS
FT, TTa and NRST I/O input
hysteresis
1.7 VVDD3.6 V
10%VDD(3)
--
V
BOOT I/O input hysteresis
1.75 VVDD 3.6 V, –
40 °CTA 105 °C
0.1
-
-
1.7 VVDD 3.6 V,
0 °CTA 105 °C
Ilkg
I/O input leakage current (4)
VSS VIN VDD
--
±1
µA
I/O FT input leakage current
(5)
VIN = 5 V
-
-
3
RPU
Weak pull-up
equivalent
resistor(6)
All pins
except for
PA10/PB12
(OTG_FS_ID
,OTG_HS_ID
)
VIN = VSS
30
40
50
k
Ω
PA10/PB12
(OTG_FS_ID
,OTG_HS_ID
)
710
14
RPD
Weak pull-
down
equivalent
resistor(7)
All pins
except for
PA10/PB12
(OTG_FS_ID
,OTG_HS_ID
)
VIN = VDD
30
40
50
PA10/PB12
(OTG_FS_ID
,OTG_HS_ID
)
710
14
CIO(8) I/O pin capacitance
-
-
5
-
pF
1. Guaranteed by design.
2. Tested in production.
3. With a minimum of 200 mV.
4. Leakage could be higher than the maximum value, if negative current is injected on adjacent pins, Refer to Table 55: I/O
current injection susceptibility
5. To sustain a voltage higher than VDD +0.3 V, the internal pull-up/pull-down resistors must be disabled. Leakage could be
higher than the maximum value, if negative current is injected on adjacent pins.Refer to Table 55: I/O current injection
susceptibility
6. Pull-up resistors are designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the
series resistance is minimum (~10% order).
Table 56. I/O static characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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