USB2642 datasheet(11/56 Pages) MICROCHIP

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 2014-2015 Microchip Technology Inc.

DS00001578C-page 11

USB2642

SPI_DO/

I/O12

SPI Data Out

This is the data out for the SPI port. See Section 5.4, "ROM Boot

Sequence" for diagram and usage instructions.

SDA_EP

This pin is the data pin when the device is connected to the optional I²C

EEPROM.

SPI_SPD_SEL

This pin is used to pick the speed of the SPI interface. During RESET_N

assertion, this pin will be tri-stated with the weak pull-down resistor

enabled. When RESET_N is negated, the value on the pin will be

internally latched, and the pin will revert to SPI_DO functionality.

Additionally, the internal pull-down will be disabled.

: 30 MHz

: 60 MHz

If the latched value is 1, then the pin is tri-stated when the chip is in the

suspend state.

If the latched value is 0, then the pin is driven low during a suspend state.

SPI_DI

I/O12PD

SPI Data In

This is the data in to the controller from the SPI ROM.

Misc

GPO1

I/O12

This general purpose pin is set to be used as an output.

CRD_PWR

I/O200

Card power drive: 3.3 V (200 mA)

This pin powers the multiplexed flash media interface (slot) for the SD/

MMC interface.

Bits 0, 1, 2, and 3 control FET 2 of Register A5h. See Section 7.4.2.11,

"A4h-A5h: LUN 0 Power Configuration," on page 26 for more information.

IPU

REG_EN

IPU

Regulator Enable

This pin is internally pulled up to enable the internal 1.8 V regulators. In

order to disable the regulators, this pin will need to be externally

connected to ground.

When the internal regulator is enabled, the 1.8 V power pins must be left

unconnected, except for the required bypass capacitors.

RESET_N

RESET input

This active low signal is used by the system to reset the chip. The active

low pulse should be at least 1 µs wide.

TEST[2:0]

IPD

TEST Input

Tie these test pins to ground for normal operation.

Digital/Power/Ground

VDD18

1.8 V Digital Core Power Bypass

This pin requires an external bypass capacitor of 1.0 µF.

If REG_EN is low, this pin serves as a power supply (1.8 V) for the device.

VDD33

3.3 V Power and Regulator Input

• 48QFN - Pin 16 requires an external bypass capacitor of 4.7 µF mini-

mum.

VDD33 (OTP)

3.3 V Power

TABLE 5-1:

USB2642 PIN DESCRIPTIONS

Symbol

48-Pin

QFN

Buffer

Type

Description

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