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PIC16F628-20/SS Datasheet(PDF) 110 Page - Microchip Technology |
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PIC16F628-20/SS Datasheet(HTML) 110 Page - Microchip Technology |
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110 / 160 page  PIC16F62X DS40300B-page 110 Preliminary © 1999 Microchip Technology Inc. FIGURE 14-18: WATCHDOG TIMER BLOCK DIAGRAM TABLE 14-9: SUMMARY OF WATCHDOG TIMER REGISTERS Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR Reset Value on all other Resets 2007h Config. bits LVP BOREN MCLRE FOSC2 PWRTE WDTE FOSC1 FOSC0 uuuu uuuu uuuu uuuu 81h OPTION RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 Legend: Shaded cells are not used by the Watchdog Timer. Note: _ = Unimplemented location, read as “0” + = Reserved for future use From TMR0 Clock Source (Figure 6-6) To TMR0 (Figure 6-6) Postscaler Watchdog Timer M U X PSA 8 - to -1 MUX PSA WDT Time-out 1 0 0 1 WDT Enable Bit PS<2:0> • • Note: T0SE, T0CS, PSA, PS0-PS2 are bits in the OPTION register. 8 MUX |
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