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PIC16F628-20/SS Datasheet(PDF) 37 Page - Microchip Technology |
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PIC16F628-20/SS Datasheet(HTML) 37 Page - Microchip Technology |
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37 / 160 page ![]() © 1999 Microchip Technology Inc. Preliminary DS40300B-page 37 PIC16F62X FIGURE 5-10: BLOCK DIAGRAM OF RB2/TX/CK PIN Data Latch TRIS Latch RD TRISB P Vss Q D Q CK Q D Q CK EN QD EN N VDD 0 1 RD PORTB WR PORTB WR TRISB Schmitt Trigger Peripheral OE(2) Data Bus PORT/PERIPHERAL Select(1) USART TX/CK output RD PORTB RB2/TX/CK USART Slave Clock in RBPU VDD weak pull-up TTL input buffer P Note 1: Port/Peripheral select signal selects between port data and peripheral output. Note 2: Peripheral OE( output enable) is only active if peripheral select is active. pin VDD VSS |
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