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UPSL1630G-S08-R Datasheet(PDF) 5 Page - Unisonic Technologies |
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UPSL1630G-S08-R Datasheet(HTML) 5 Page - Unisonic Technologies |
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5 / 7 page ![]() UPSL1630 Preliminary CMOS IC UNISONICTECHNOLOGIESCO.,LTD 5 of 7 www.unisonic.com.tw QW-R502-A010.b APPLICATION INFORMATION The UTC UPSL1630 is a primary-side-control AC-DC LED driver which can achieve high power factor and accurate LED current for an isolate lighting application in a single stage converter. The LED current can be controlled accurately from the primary side information and integrates power factor correction function and works in DCM and constant OFF time mode for reducing the harmonic current emission (THD). Startup Control A soft-start function is implemented to prevent the transformer from entering into CCM. The VDD pin of UTC UPSL1630 is charged through a startup resistor. When the VDD voltage reaches VTH(ON), the internal startup circuit is disabled and the IC turns on. Then, the STP pin is clamped to lower than VDD voltage about 0.2V. Operating Current The Operating current of UTC UPSL1630 is as low as 3mA. Good efficiency and very low standby power can be achieved. Constant Current Operation UTC UPSL1630 use the primary side constant current control method to accurately control the LED current. The LED real current can be approximated as: CS S P LED R V 4 . 0 N N × 2 1 I ≈ Where NP is primary winding, NS is secondary winding; RCS is an external current sensing resistor. Power Factor Correction The primary side current increases linearly from zero to peak value, during the external MOSFET on-time. When the primary current reaches the threshold, UTC UPSL1630 turns off the power MOSFET immediately. After a constant OFF time, TOFF, UTC UPSL1630 turns on the power MOSFET again. The peak current threshold follows the rectified sinusoidal-shape of main line voltage. As a result, the envelope of the inductor current is sinusoidal-shaped, high power factor is therefore achieved in this way. Over-voltage Protection UTC UPSL1630 built-in two over-voltage protection schemes: (1) If DSEN pin’s voltage is detected above 3.2V for three times, UTC UPSL1630 turns off the PWM switching signal, and VDD voltage gradually drops to UVLO threshold, and the system will be re-started. The threshold voltage of the output over voltage protection can be easily defined as: A S OVP _ OUT N N × ) 6 R 5 R + 1 ( × 2 . 3 = V-VD8 Where NS is the secondary winding, NA is auxiliary winding, VD8 is the forward bias of the secondary side rectifier diode. (2) If VDD pin’s voltage exceeds 19.2V three times, UTC UPSL1630 turns off the PWM switching signal, and VDD gradually drops to UVLO threshold, and then the system will be re-started. |
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