Automatic shutdown results in dramatic power savings,

particularly at slow conversion rates and with internal

clock. For example, at a conversion rate of 10ksps, the

average supply current for the MAX1237 is 60µA (typ) and

drops to 6µA (typ) at 1ksps. At 0.1ksps the average sup-

ply current is just 1µA, or a minuscule 3µW of power con-

sumption, see Average Supply Current vs. Conversion

Rate in the Typical Operating Characteristics section).

Reference Voltage

SEL[2:0] of the setup byte (Table 1) control the reference

and the AIN_/REF configuration (Table 6). When

AIN_/REF is configured to be a reference input or refer-

ence output (SEL1 = 1), differential conversions on

AIN_/REF appear as if AIN_/REF is connected to GND

(see Note 2 and Table 4). Single-ended conversion in

scan mode AIN_/REF is ignored by the internal limiter,

which sets the highest available channel at AIN2 or

AIN10.

Internal Reference

The internal reference is 4.096V for the MAX1236/

MAX1238 and 2.048V for the MAX1237/MAX1239. SEL1 of

the setup byte controls whether AIN_/REF is used for an

analog input or a reference (Table 6). When AIN_/REF is

configured to be an internal reference output (SEL[2:1] =

11), decouple AIN_/REF to GND with a 0.1µF capacitor.

Once powered up, the reference always remains on until

reconfigured. The reference should not be used to supply

current for external circuitry.

External Reference

maximum conversion accuracy, the reference must be

able to deliver up to 40µA and have an output imped-

ance of 500k

Ω or less. If the reference has a higher out-

put impedance or is noisy, bypass it to GND as close to

AIN_/REF as possible with a 0.1µF capacitor.

Transfer Functions

Output data coding for the MAX1236–MAX1239 is bina-

ry in unipolar mode and two’s complement in bipolar

of bits (12). Code transitions occur halfway between

successive-integer LSB values. Figures 12 and 13

show the input/output (I/O) transfer functions for unipo-

lar and bipolar operations, respectively.

Layout, Grounding, and Bypassing

Only use PC boards. Wire-wrap configurations are not

recommended since the layout should ensure proper

separation of analog and digital traces. Do not run ana-

log and digital lines parallel to each other, and do not

layout digital signal paths underneath the ADC pack-

age. Use separate analog and digital PC board ground

sections with only one star point (Figure 14) connecting

the two ground systems (analog and digital). For lowest

noise operation, ensure the ground return to the star

ground’s power supply is low impedance and as short

as possible. Route digital signals far away from sensi-

tive analog and reference inputs.

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,

4-/12-Channel, 2-Wire Serial, 12-Bit ADCs

18

______________________________________________________________________________________

SEL2

SEL1

SEL0

REFERENCE VOLTAGE

AIN_/REF

INTERNAL REFERENCE

STATE

00

X

Analog Input

Always Off

0

1

X

External Reference

Reference Input

Always Off

1

0

0

Internal Reference

Analog Input

Always Off

1

0

1

Internal Reference

Analog Input

Always On

1

1

0

Internal Reference

Reference Output

Always Off

1

1

1

Internal Reference

Reference Output

Always On

Table 6. Reference Voltage and AIN_/REF Format

111...111

OUTPUT CODE

FS = REF + GND

ZS = GND

FULL-SCALE

TRANSITION

111...110

100...010

100...001

100...000

011...111

011...110

011...101

000...001

000...000

0

1

2048

INPUT VOLTAGE (LSB)

GND

FS -

1

LSB

2

1 LSB =

4096

Figure 12. Unipolar Transfer Function