UPD78P324LP datasheet(36/80 Pages) NEC

36 / 80 page

µPD78P324, 78P324(A)

(2)

µPD78P324(A) Electrical Specifications (5/9)

AC Characteristics (TA = –40 to +85

°C, VDD = +5 V ±10%, VSS = 0 V, CL = 100pF)

Non-serial Read/Write Operation (when connecting general-purpose memory)

Parameter

Symbol

Condition

MIN.

MAX.

Unit

System clock cycle time

tCYK

125

250

Address setup time (vs. ASTB

↓)tSAST

Address hold time (vs. ASTB

↓)tHSTA

Address

→ RD ↓ delay time

tDAR

↓ → address float time

tFRA

Address

→ data input time

tDAID

222

↓ → data input time

tDRID

112

ASTB

↓ → RD ↓ delay time

tDSTR

Data hold time (vs. RD

↑)tHRID

0ns

↑ → address active time

tDRA

RD low-level width

tWRL

147

ASTB high-level width

tWSTH

Address

→ WR ↓ delay time

tDAW

ASTB

↓ → data output time

tDSTOD

102

↓ → data output time

tDWOD

ASTB

↓ → WR ↓ delay time

tDSTW

Data setup time (vs. WR

↑)tSODW

147

Data hold time (vs. WR

↑)tHWOD

↑ → ASTB ↑ delay time

tDWST

WR low-level width

tWWL

147

UPD78P324LP Datasheet(PDF) 36 Page - NEC

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