5

LT1312

at 2.4V. The input thresholds are compatible with CMOS

controllers and can be driven from either 5V or 3.3V

CMOS logic. ESD protection diodes limit input excursions

to 0.6V below ground.

VALID Output Pin: This pin is an open-collector NPN

regulation, i.e., when it is above 11V. An external 51k pull-

up resistor is connected between this output and the same

5V or 3.3V logic supply powering the PCMCIA compatible

control logic.

pending upon the voltage sensed at the PCMCIA card

mately 30

µA.For5Vonlyoperation,connecttheSensepin

directly to ground. An ESD protection diode limits the

input voltage to 0.6V below ground.

Supply Pin: Power is supplied to the device through the

supply pin. The supply pin should be bypassed to ground

if the device is more than 6 inches away from the main

supply capacitor. A bypass capacitor in the range of 0.1

µF

to 1

µF is sufficient. The supply voltage to the LT1312 can

be loosely regulated between 13V and 20V. See Applica-

tions Information section for more detail.

PCMCIA card VPP pins which are typically tied together

to approximately 330mA. Thermal shutdown provides a

second level of protection. A 1

µF to 10µF tantalum output

capacitor is recommended. See Applications Informa-

tion section for more detail on output capacitor consid-

erations.

Input Enable Pins: The two digital input pins are high

impedance inputs with approximately 20

µA input current

–

+

–

+

EN0

EN1

VALID

LT1312 BD

11V

LOW DROPOUT

LINEAR

REGULATOR

VOLTAGE

LOGIC CONTROL

4V