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UPD72871F1 Datasheet(PDF) 13 Page - NEC

No. de pieza UPD72871F1
Descripción Electrónicos  IEEE1394 1-CHIP OHCI HOST CONTROLLER
PDF  48 Pages
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Fabricante Electrónico  NEC [NEC]
Página de inicio  http://www.nec.com/
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UPD72871F1 Datasheet(HTML) 13 Page - NEC

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Preliminary Data Sheet S13925EJ2V0DS00
13
µµµµPD72870,72871
1. PIN FUNCTIONS
1.1 PCI/Cardbus Interface Signals: (52 pins)
(1/2)
Pin No.
Name
I/O
LQFP
FPBGA
IOL
Volts(V)
Function
PAR
I/O
45
R4
PCI/Cardbus
5/3.3
Parity is even parity across AD0-AD31 and CBE0-CBE3. It is
an input when AD0-AD31 is an input; it is an output when AD0-
AD31 is an output.
AD0-AD31
I/O
11-14,
16-19,
24-27,
29,30,32,
33,49,50,
52,53,
55-58,
61-64,
66-69
E1,E2,
F1,F2,
G1,G2,
H1,H2,
K1,K2,
L1,L2,
M1,M2,
N1,N2,
R5-R12,
T5-T12
PCI/Cardbus
5/3.3
PCI Multiplexed Address and Data
CBE0-CBE3
I
22,35,47,
60
J2,P2,P9,
T4
-
5/3.3
Command/Byte Enables are multiplexed Bus Commands &
Byte enables.
FRAME
I/O
36
P1
PCI/Cardbus
5/3.3
Cycle Frame is asserted by the initiator to indicate the cycle
beginning and is kept asserted during the burst cycle.
If Cardbus mode (CARD_ON = 1), this pin is should be pulled
up to VDD.
TRDY
I/O
38
R1
PCI/Cardbus
5/3.3
Target Ready indicates that the current data phase of the
transaction is ready to be completed.
IRDY
I/O
37
R2
PCI/Cardbus
5/3.3
Initiator Ready indicates that the current bus master is ready
to complete the current data phase. During a write, its assertion
indicates that the initiator is driving valid data onto the data bus.
During a read, its assertion indicates that the initiator is ready
to accept data from the currently-addressed target.
REQ
O
8
D1
PCI/Cardbus
5/3.3
Bus_master Request indicates to the bus arbiter that this
device wants to become a bus master.
GNT
I
7
D2
-
5/3.3
Bus_master Grant indicates to this device that access to the
bus has been granted.
IDSEL
I
23
J1
-
5/3.3
ID Select when actively driven, indicates that the IUHC is chip-
selected for configuration read/write transaction during the
phase of device initialization.
If Cardbus mode (CARD_ON = 1), this pin is should be pulled
up to VDD.
DEVSEL
I/O
39
T1
PCI/Cardbus
5/3.3
Device Select when actively driven, indicates that the driving
device has decoded its address as the target of the current
access.
STOP
I/O
42
T2
PCI/Cardbus
5/3.3
PCI Stop when actively driven, indicates that the target is
requesting the current bus master to stop the transaction.
5
5
5
5
5
5
5
5



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