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AN4650 Datasheet(PDF) 90 Page - STMicroelectronics

No. de pieza AN4650
Descripción Electrónicos  This document is intended to provide usage information
PDF  102 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN4650 Datasheet(HTML) 90 Page - STMicroelectronics

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First-in first-out (FIFO) buffer
AN4650
90/102
DocID027415 Rev 1
8.5.2
Example 2
Supposing the FIFO is storing data from the gyroscope and accelerometer at different
ODRs:
Gyroscope ODR = 208 Hz, Accelerometer ODR = 104 Hz.
If the internal trigger (accelerometer/gyroscope data-ready) is used, it’s recommended to set
the ODR_FIFO_[3:0] bits of the FIFO_CTRL5 register to 0101b in order to set the FIFO
trigger ODR to 208 Hz.
The DEC_FIFO_GYRO[2:0] field of theFIFO_CTRL3 register has to be set to 001b (no
decimation applied to gyroscope data) and the DEC_FIFO_XL[2:0] field has to be set to
010b (decimation with factor 2 applied to accelerometer data).
Since the gyroscope ODR is twice the accelerometer ODR, the following data pattern is
repeated every 9 samples (each sample is represented as 16-bit data):
Gx Gy Gz XLx XLy XLz Gx Gy Gz
The FIFO_PATTERN_[9:0] bits will contain a number from 0 to 8, as shown in Table 72.
Table 71. Example 1: FIFO_PATTERN_[9:0] bits and next reading
Time
FIFO_PATTERN_[9:0]
Next reading from FIFO output registers
t0
0
Gx
t0
1
Gy
t0
2
Gz
t0
3
XLx
t0
4
XLy
t0
5
XLz
Table 72. Example 2: FIFO_PATTERN_[9:0] bits and next reading
Time
FIFO_PATTERN_[9:0]
Next reading from FIFO
output registers
t0
0
Gx
t0
1
Gy
t0
2
Gz
t0
3
XLx
t0
4
XLy
t0
5
XLz
t1
6
Gx
t1
7
Gy
t1
8
Gz



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