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AN4192 Datasheet(PDF) 28 Page - STMicroelectronics |
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AN4192 Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 47 page  Low-side FET selection AN4192 28/47 Doc ID 023820 Rev 1 Figure 31. LS with monolithic Schottky diode waveforms @ 20 A The efficiency improvement caused by an optimized LS body diode can be appreciated only if the converter switching frequency increases: in fact, the higher the fSW, the larger the reverse recovery losses (see (5)). We compare the above mentioned LS FETs (LS and LS+Sch.) in a 2-phase synchronous buck converter (VIN = 12 V, VOUT = 1.5 V, fSW = 610 kHz, 2 x HS, 2 x LS, IOUT = 60 A - Figure 32). External gate resistances are connected to HS (2.2 Ω) and LS (2.2 Ω) FETs. No snubber network is mounted on the board. As can be seen in Figure 33, at high output currents, due to lower diode conduction and reverse recovery losses, the solution with LS+Sch. has higher efficiency (+1.5% at full load). AM16474V1 |
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