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AN2827 Datasheet(PDF) 21 Page - STMicroelectronics

No. de pieza AN2827
Descripción Electrónicos  Driver for double flash LED with I²C interface
PDF  30 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2827 Datasheet(HTML) 21 Page - STMicroelectronics

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AN2827
Reading and writing to the STCF05 registers through the I²C bus
Doc ID 15047 Rev 1
21/30
7.3
Reading from a single register
The reading operation starts with a START bit followed by the 7-bit device address of the
STCF05. The 8th bit is the R/W bit, which is 0 in this case. The STCF05 confirms the
receiving of the address + R/W bit by an acknowledge pulse. The address of the register
which should be read is then sent and confirmed by another acknowledge pulse from the
STCF05. The master then generates another START bit and sends the device address
followed by the R/W-bit, which is now 1. The STCF05 confirms the receiving of the address
+ R/W-bit by an acknowledge pulse, and starts to send data to the master. No acknowledge
pulse from the master is required after receiving the data. The master then generates a
STOP bit to terminate the communication.
Figure 16.
Writing to multiple register
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER i
DATA i
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
DATA i+1
A
C
K
L
S
B
DATA i+2
A
C
K
L
S
B
DATA i+2
L
S
B
DATA i+n
A
C
K
M
S
B
M
S
B
M
S
B
M
S
B
M
S
B
A
C
K
L
S
B
SDA LINE
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER i
DATA i
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
DATA i+1
A
C
K
L
S
B
DATA i+2
A
C
K
L
S
B
DATA i+2
L
S
B
DATA i+n
A
C
K
M
S
B
M
S
B
M
S
B
M
S
B
M
S
B
A
C
K
L
S
B
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER i
DATA i
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
DATA i+1
A
C
K
L
S
B
DATA i+2
A
C
K
L
S
B
DATA i+2
L
S
B
DATA i+n
A
C
K
M
S
B
M
S
B
M
S
B
M
S
B
M
S
B
A
C
K
L
S
B
SDA LINE
Figure 17.
Reading from a single register
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
ADDRESS
OF
REGISTER
A
C
K
M
S
B
L
S
B
S
T
A
R
T
A
C
K
R
/
W
R
E
A
D
DEVICE
ADDRESS
7 bits
DATA
L
S
B
S
T
O
P
N
O
A
C
K
SDA LINE
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
ADDRESS
OF
REGISTER
A
C
K
M
S
B
L
S
B
S
T
A
R
T
A
C
K
R
/
W
R
E
A
D
DEVICE
ADDRESS
7 bits
DATA
L
S
B
S
T
O
P
N
O
A
C
K
SDA LINE



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