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UM0434 Datasheet(PDF) 90 Page - STMicroelectronics

No. de pieza UM0434
Descripción Electrónicos  The primary objective of this user?셲 manual is to describe
PDF  390 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM0434 Datasheet(HTML) 90 Page - STMicroelectronics

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UM0434
Register model
91/391
TLB configuration register 1 (TLB1CFG)
TLB1CFG, shown in
Table 71, provides information on the TLB1 configuration.
The TLB1CFG fields are described in
Table 72.
4.16.4
MMU assist registers (MAS0–MAS4, MAS6)
The e200z3 uses six special purpose registers (MAS0–MAS4, and MAS6) for reading,
writing, and searching the TLBs. The MAS registers can be read or written using the mfspr
and mtspr instructions. The e200z3 does not implement the MAS5 register, which is
present in other Book E designs, because the tlbsx instruction only searches based on a
single SPID value.
49
AVAIL
Page size availability.
0
50–51
—
Reserved, should be cleared.
52–63
NENTRY
Number of entries.
0 TLB0 contains 0 entries.
Table 70.
TLB0CFG field descriptions (continued)
Bits
Name
Description
Table 71.
TLB configuration register 1 (TLB1CFG)
32
39
40
43
44
47
48
49
50 51
52
63
Field
ASSOC
MINSIZE
MAXSIZE
IPROT
AVAIL
—
NENTRY
Reset
0010_0000
0001
1001
1
1
00
0000_0010_0000
R/W
Read only
SPR
SPR 689
Table 72.
TLB1CFG field descriptions
Bits
Name
Description
32–39
ASSOC
Associativity.
0x10 Indicates that TLB1 associativity is 16
40–43
MINSIZE
Minimum page size.
0x1 Smallest page size is 4 Kbytes.
44–47 MAXSIZE
Maximum page size.
0x9 Largest page size is 256 Mbytes.
48
IPROT
Invalidate protect capability.
1 Invalidate protect capability is supported in TLB1.
49
AVAIL
Page size availability.
1 All page sizes between MINSIZE and MAXSIZE are supported.
50–51
—
Reserved, should be cleared.
52–63
NENTRY
Number of entries.
0x010 TLB1 contains 16 entries.



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