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AN3410 Datasheet(PDF) 10 Page - STMicroelectronics |
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AN3410 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 28 page ![]() Circuit description AN3410 10/28 Doc ID 018890 Rev 1 Select 0.681 Ω. Average input current will be slightly lower than expected - the input voltage and current are assumed sinusoidal, and the average current will be 0.9 times the input rms current. So at the design center of 115 V, average input current is Equation 3 The bulk of this current flows in R22, so the average voltage on R22 is Equation 4 R17 serves two functions - it is part of the linear approximation calculation, and part of a low-pass filter that cleans up both the triangular FET drain current pulses and the 120 Hz envelope. A value of 20 k Ω has been selected somewhat arbitrarily. At our nominal operating point, the average voltage developed on R17 due to line voltage must be equal to the average voltage at its lower end from R22. The current required is Equation 5 The L6564 Vff terminal connects internally to a precision peak detector. Its normal function, which will not be used, is to reduce the loop gain at high line voltages. However, the peak detector function gives us a buffered peak line voltage (minus LED voltage) reference. If LED voltage is zero, the entire line voltage appears on divider R6-R15-R20. For nominal line, the peak voltage at U1's MULT input is Equation 6 To provide the 5.3 µA needed by the linear compensator, Equation 7 We will use the nearest standard value, 649 k Ω. We will now examine the LED voltage compensation, to determine the values of R12, R18, and R21. If there is no LED voltage, there will be no reflected voltage from L1's auxiliary winding. (We will assume the circuit runs anyway) Therefore, R12 contributes no current. Since there is no output voltage there will be no output power, and since efficiency is assumed constant, no input power. Therefore, there will be no voltage on R22, and the only voltage on C12 will be the divided line peak voltage from C6. Divider R17-R14 will deliver 0.106 V to the non- inverting input of U2. If the loop is balanced, the op amp output will be at exactly 2.5 V (so that the COMP terminal on U1 does not move). The op amp inputs will be at exactly the same voltage, 0.106 V. 0.156A * 0.681 Ohms = 0.106V =3.61 V |
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