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ADF4106BCPZ-R7 Datasheet(PDF) 14 Page - Analog Devices

No. de pieza ADF4106BCPZ-R7
Descripción Electrónicos  PLL Frequency Synthesizer
PDF  24 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

ADF4106BCPZ-R7 Datasheet(HTML) 14 Page - Analog Devices

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ADF4106
Data Sheet
Rev. E | Page 14 of 24
Table 8. N (A, B) Counter Latch Map
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (0) C1 (1)
A1
A2
A3
A4
A5
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
A6
DB21
DB22
DB23
G1
0
0
0
1
1
0
F4 (FUNCTION LATCH)
FASTLOCK ENABLE
1
1
A6
A5
..........
A2
A1
0
0
..........
0
0
0
0
0
..........
0
1
1
0
0
..........
1
0
2
0
0
..........
1
1
3
.
.
..........
.
.
.
.
.
..........
.
.
.
.
.
..........
.
.
.
1
1
..........
0
0
60
1
1
..........
0
1
61
1
1
..........
1
0
62
1
1
..........
1
1
63
X
X
B13
B12
B11
B3
B2
B1
0
0
0
..........
0
0
0
0
0
0
..........
0
0
1
0
0
0
..........
0
1
0
0
0
0
..........
0
1
1
3
.
.
.
..........
.
.
.
.
.
.
.
..........
.
.
.
.
.
.
.
..........
.
.
.
.
1
1
1
..........
1
0
0
8188
1
1
1
..........
1
0
1
8189
1
1
1
..........
1
1
0
8190
1
1
1
..........
1
1
1
8191
X = DON’T CARE
RESERVED
13-BIT B COUNTER
6-BIT A COUNTER
CONTROL
BITS
A COUNTER
DIVIDE RATIO
B COUNTER DIVIDE RATIO
NOT ALLOWED
NOT ALLOWED
NOT ALLOWED
THESE BITS ARE NOT USED
BY THE DEVICE AND ARE
DON'T CARE BITS.
OPERATION
CP GAIN
CHARGE PUMP CURRENT
SETTING 1 IS PERMANENTLY USED.
CHARGE PUMP CURRENT
SETTING 2 IS PERMANENTLY USED.
CHARGE PUMP CURRENT
SETTING 1 IS USED.
CHARGE PUMP CURRENT IS
SWITCHED TO SETTING 2. THE
TIME SPENT IN SETTING 2 IS
DEPENDENT ON WHICH FASTLOCK
MODE IS USED. SEE FUNCTION
LATCH DESCRIPTION.
N = BP + A, P IS PRESCALER VALUE SET IN THE FUNCTION
LATCH. B MUST BE GREATER THAN OR EQUAL TO A. FOR
CONTINUOUSLY ADJACENT VALUES OF (N
× F
REF), AT THE
OUTPUT, NMIN IS (P2 – P).



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