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80960SA Datasheet(PDF) 9 Page - Intel Corporation |
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80960SA Datasheet(HTML) 9 Page - Intel Corporation |
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9 / 39 page ![]() 5 80960SA purpose registers provided in other popular micro- processors. The term global refers to the fact that these registers retain their contents across procedure calls. The local registers, on the other hand, are procedure specific. For each procedure call, the 80960SA allocates 16 local registers (r0 through r15). Each local register is 32 bits wide. 1.1.4 Multiple Register Sets To further increase the efficiency of the register set, multiple sets of local registers are stored on-chip (See Figure 4). This cache holds up to four local register frames, which means that up to three procedure calls can be made without having to access the procedure stack resident in memory. Although programs may have procedure calls nested many calls deep, a program typically oscillates back and forth between only two to three levels. As a result, with four stack frames in the cache, the proba- bility of having a free frame available on the cache when a call is made is very high. In fact, runs of representative C-language programs show that 80% of the calls are handled without needing to access memory. If four or more procedures are active and a new procedure is called, the 80960SA moves the oldest local register set in the stack-frame cache to a procedure stack in memory to make room for a new set of registers. Global register g15 is the frame pointer (FP) to the procedure stack. Global registers are not exchanged on a procedure call, but retain their contents, making them available to all procedures for fast parameter passing. Figure 4. Multiple Register Sets Are Stored On-Chip r15 r0 31 0 ONE OF FOUR LOCAL REGISTER SETS REGISTER CACHE LOCAL REGISTER SET |
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