MK3754

Low Cost 54 MHz 3.3 Volt VCXO

MDS 3754 D

3

Revision 060100

Printed 11/16/00

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800 tel • www.icst.com

I C R O

Parameter

Conditions

Minimum

Typical

Maximum

Units

ABSOLUTE MAXIMUM RATINGS (note 1)

ABSOLUTE MAXIMUM RATINGS (note 1)

Supply voltage, VDD

Referenced to GND

7

V

Inputs and Clock Outputs

Referenced to GND

-0.5

VDD+0.5

V

Ambient Operating Temperature

0

70

°C

Soldering Temperature

Max of 10 seconds

260

°C

Storage temperature

-65

150

°C

DC CHARACTERISTICS (VDD = 3.3 V unless noted)

DC CHARACTERISTICS (VDD = 3.3 V unless noted)

Operating Voltage, VDD

3.15

3.45

V

Output High Voltage, VOH

IOH=-12mA

2.4

V

Output Low Voltage, VOL

IOL=12mA

0.4

V

Output High Voltage, VOH, CMOS level

IOH=-4mA

VDD-0.4

V

Operating Supply Current, IDD

No Load

9

mA

Short Circuit Current

±50

mA

VIN, VCXO control voltage

0

3.3

V

AC CHARACTERISTICS (VDD = 3.3 V unless noted)

AC CHARACTERISTICS (VDD = 3.3 V unless noted)

Input Crystal Frequency

13.50000

MHz

Output Clock Rise Time

0.8 to 2.0V

1.5

ns

Output Clock Fall Time

2.0 to 0.8V

1.5

ns

Output Clock Duty Cycle

At 1.4V

40

50

60

%

Maximum Absolute Jitter, short term

100

ps

54 MHz output pullability, note 2

0V

≤ VIN ≤ 3.3 V

±100

ppm

Electrical Specifications

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged

exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.

2. With an ICS approved pullable crystal. The A version has a typical range of ±180 ppm.

External Components

The MK3754 requires a minimum number of external components for proper operation. A decoupling

capacitor of 0.01µF should be connected between VDD and GND on pins 2 and 4, as close to the

MK3754 as possible. A series termination resistor of 33

Ω may be used for the clock output. The input

crystal must be connected as close to the chip as possible. The input crystal should be a parallel mode,

pullable, AT cut, 13.5 MHz, with 14 pF load capacitance. Consult ICS for recommended suppliers.

IMPORTANT - read application note MAN05 before laying out the PCB.