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STMPE1801 Datasheet(PDF) 27 Page - STMicroelectronics |
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STMPE1801 Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 60 page ![]() STMPE1801 Interrupt system Doc ID 17884 Rev 3 27/60 INT_EN_MASK Interrupt enable mask register Address: 06, 07 Type: R, R/W Reset: 0x00 Description: The interrupt enable mask register is used to enable the interruption from a particular interrupt source to the host. 15 14 13 12 11 10 9876 5 4 3 2 1 0 INT_EN_MASK_HIGH INT_EN_MASK_LOW RESERVED IE4 IE3 IE2 IE1 IE0 RRRRRRR RRR R RW RW RW RW RW 0000000000 0 0 0 0 0 0 [15:4] RESERVED [4:0] IE[x]: Interrupt Enable Mask (where x = 3 to 0) IE0: Default value is 0. IE1: Keypad controller interrupt mask IE2: Keypad controller FIFO overflow interrupt mask IE3: GPIO controller interrupt mask IE4: Combination key interrupt enable Writing a ‘1’ to the IE[x] bit enables the interruption to the host. |
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