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CS5331A Datasheet(PDF) 5 Page - Cirrus Logic

No. de pieza CS5331A
Descripción Electrónicos  8-Pin, Stereo A/D Converter for Digital Audio
PDF  30 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS5331A Datasheet(HTML) 5 Page - Cirrus Logic

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SWITCHING CHARACTERISTICS
(TA = 25
°C; VA+ = 5V ± 5%; Inputs: Logic 0 = 0V, Logic
1 = VA+; CL = 20 pF) Switching characteristics are guaranteed by characterization.
Parameter
Symbol
Min
Typ
Max
Units
Output Sample Rate
Fs
2
-
50
kHz
MCLK Period
MCLK / LRCK = 256
t clkw
78
1000
ns
MCLK Low
MCLK / LRCK = 256
t clkl
31
-
1000
ns
MCLK High
MCLK / LRCK = 256
t clkh
31
-
1000
ns
MCLK Period
MCLK / LRCK = 384
t clkw
52
1000
ns
MCLK Low
MCLK / LRCK = 384
t clkl
20
-
1000
ns
MCLK High
MCLK / LRCK = 384
t clkh
20
-
1000
ns
MCLK Period
MCLK / LRCK = 512
t clkw
39
1000
ns
MCLK Low
MCLK / LRCK = 512
t clkl
13
-
1000
ns
MCLK High
MCLK / LRCK = 512
t clkh
13
-
1000
ns
MASTER MODE
SCLK falling to LRCK
t mslr
-10
-
10
ns
SCLK falling to SDATA valid
t sdo
-10
-
35
ns
SCLK Duty cycle
-
50
-
%
SLAVE MODE
LRCK duty cycle
25
50
75
%
SCLK Period
t sclkw
(Note 10)
-
-
ns
SCLK Pulse Width Low
t sclkl
(Note 11)
-
-
ns
SCLK Pulse Width High
t sclkh
20
-
-
ns
SCLK falling to SDATA valid
t dss
-
-
(Note 12)
ns
LRCK edge to MSB valid
t lrdss
-
-
(Note 12)
ns
SCLK rising to LRCK edge delay
t slr1
20
-
-
ns
LRCK edge to rising SCLK setup time
t slr2
(Note 12)
-
-
ns
Notes:10.
1
64 Fs
11.
1
128 Fs
−15 ns
12.
1
256 Fs
+ 5 ns
CS5330A/CS5331A
DS138F2
5



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