CS5317 datasheet(6/32 Pages) CIRRUS

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GENERAL DESCRIPTION

The CS5317 functions as a complete data conver-

sion subsystem for voiceband signal processing.

The A/D converter, sample/hold, voltage refer-

ence, and much of the antialiasing filtering are

performed on-chip. The CS5317’s serial interface

offers its 16-bit, 2’s complement output in a for-

mat

which

easily

interfaces

with

industry-standard micro’s and DSP’s.

The CS5317 also includes a phase-locked loop

that simplifies the converter’s application in sys-

tems which require sampling to be locked to an

external signal source. The CS5317 continuously

samples its analog input at a rate set by an exter-

nal clock source. On-chip digital filtering, an

integral part of the delta-sigma ADC, processes

the data and updates the 16-bit output register at

up to 20 kHz. The CS5317 can be read at any rate

up to 20 kHz.

The CS5317 is a CS5316 with an on-chip sam-

pling clock generator. As such, it replaces the

CS5316 and should be considered for all new de-

signs. In addition, a CS5316 look-alike mode is

included, allowing a CS5317 to be dropped into a

CS5316 socket.

THEORY OF OPERATION

The CS5317 utilizes the delta-sigma technique of

executing low-cost, high-resolution A/D conver-

sions. A delta-sigma A/D converter consists of

two basic blocks: an analog modulator and a digi-

tal filter.

Conversion

The analog modulator consists of a 1-bit A/D

converter (that is, a comparator) embedded in an

analog negative feedback loop with high open-

loop gain. The modulator samples and converts

the analog input at a rate well above the band-

width of interest (2.5 MHz for the CS5317). The

modulator’s 1-bit output conveys information in

the form of duty cycle. The digital filter then

processes the 1-bit signal and extracts a high

resolution output at a much lower rate (that is,

16-bits at a 20 kHz word rate with a 5 kHz input

bandwidth).

An elementary example of a delta-sigma A/D

converter is a conventional voltage-to-frequency

converter and counter. The VFC’s 1-bit output

conveys information in the form of frequency (or

duty-cycle), which is then filtered (averaged) by

the counter for higher resolution. In comparison,

the CS5317 uses a more sophisticated multi-order

modulator and more powerful FIR filtering to ex-

tract higher word rates, much lower noise, and

more useful system-level filtering.

Filtering

At the system level, the CS5317’s digital filter

can be modeled exactly like an analog filter with

a few minor differences. First, digital filtering re-

sides behind the A/D conversion and can thus

reject noise injected during the conversion proc-

ess (i.e. power supply ripple, voltage reference

noise, or noise in the ADC itself). Analog filtering

cannot.

Also, since digital filtering resides behind the

A/D converter, noise riding unfiltered on a near-

full-scale input could potentially saturate the

ADC. In contrast, analog filtering removes the

noise before it ever reaches the converter. To ad-

dress this issue, the CS5317’s analog modulator

and digital filter reserve headroom such that the

device can process signals with 100mV "excur-

sions" above full-scale and still output accurately

converted and filtered data. Filtered input signals

above full-scale still result in an output of all

ones.

An Application Note called "Delta Sigma Over-

view" contains more details on delta-sigma

conversion and digital filtering.

CS5317

DS27F4

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