CMPWR150TO datasheet(7/8 Pages) CALMIRCO

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CMPWR150

CALIFORNIA MICRO DEVICES

VCC Power-down (VAUX = 0V). Figure 9 shows the

output response of the regulator during a complete

power-down situation under full load conditions.

Once VCC falls below an acceptable logic supply level

(2V), a disturbance on the Drive pin can be observed.

Drive offset = 5.0V

Load Step Response. Figure 10 shows the output

response of the regulator during a step load change from

5mA to 500mA (represented on Ch1). An initial transient

overshoot of 50mV occurs and the output settles to its

final voltage within a few microseconds. The dc voltage

disturbance on the output is approximately 75mV, which

demonstrates the regulator output impedance of 0.15Ω.

VOUT offset = 3.3V

Typical Transient Characteristics (continued)

Figure 9. VCC Power-down (VAUX = 0V).

Figure 10. Load Step Response.

Typical Thermal Characteristics

Thermal dissipation of junction heat consists primarily of

two paths in series. The first path is the junction to the case

(θJC) thermal resistance, which is defined by the package

style, and the second path is the case to ambient (θCA) thermal

resistance, which is dependent on board layout.

For a given package style and board layout, the operating

junction temperature is a function of junction power

dissipation PJUNC and the ambient temperature, resulting in

the following thermal equation:

TJUNC = TAMB + PJUNC (θJC ) + PJUNC (θCA)

The TO-263 style package has θJC of 3°C/W and when

mounted, using minimum pad layout with tab soldered

down, produces a θCA of 48°C/W. Based on maximum power

dissipation of 1.0W (2Vx500mA) with an ambient of 70°C

the resulting junction temperature will be:

TJUNC = TAMB + PJUNC (θJC ) + PJUNC (θCA)

= 70°C + 1.0W (3°C/W) + 1.0W (48°C/W)

= 70°C + 3.0°C + 48°C

= 121°C

Figure 11. Line Step Response.

Line Step Response. Figure 11 shows the output response

of the regulator to a VCC line voltage transient between 4.5V

and 5.5V (1Vpp as shown on Ch1). The load condition during

this test is 5mA. The output response produces less than

10mV of disturbance on both edges indicating a line rejection

of better than 40dB at high frequencies.

VOUT offset = 3.3V

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