SN54LS166 datasheet(4/4 Pages) MOTOROLA

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FAST AND LS TTL DATA

SN54/74LS166

TEST TABLE FOR SYNCHRONOUS INPUTS

DATA INPUT

FOR TEST

SHIFT/LOAD

OUTPUT TESTED

0 V

QH at tn+1

Serial

Input

4.5 V

QH at tn+8

AC WAVEFORMS

NOTE 1. tn = bit time before clocking transition

NOTE 1. tn+1 = bit time after one clocking transition

NOTE 1. tn+8 = bit time after eight clocking transition

NOTE 1. LS166 Vref = 1.3 V.

CLEAR INPUT

CLOCK INPUT

DATA

INPUT

(SEE TEST

TABLE)

OUTPUT Q

Vref

tw(clear)

tPHL

(clear-Q)

(SEE NOTE 1)

tn + 1

tsu

tPLH

(CLK-Q)

3 V

0 V

VOH

VOL

3 V

0 V

Vref

tn + 1

tsu

tPHL

tw(clock)

(CLK-Q)

Vref

AC CHARACTERISTICS (TA = 25°C)

Symbol

Parameter

Limits

Unit

Test Conditions

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

fMAX

Maximum Clock Frequency

MHz

VCC = 5.0 V

CL = 15 pF

tPHL

Clear to Output

VCC = 5.0 V

CL = 15 pF

tPLH

tPHL

Clock to Output

CC = 5.0 V

CL = 15 pF

AC SETUP REQUIREMENTS (TA = 25°C)

Symbol

Parameter

Limits

Unit

Test Conditions

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

Clock Clear Pulse Width

VCC = 5.0 V

Mode Control Setup Time

VCC = 5.0 V

Data Setup Time

VCC = 5.0 V

Hold Time, Any Input

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