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ATMEGA161 Datasheet(PDF) 22 Page - ATMEL Corporation |
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ATMEGA161 Datasheet(HTML) 22 Page - ATMEL Corporation |
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22 / 134 page ![]() ATmega161(L) 22 Stack Pointer – SP The ATmega161 Stack Pointer is implemented as two 8-bit registers in the I/O space locations $3E ($5E) and $3D ($5D). As the ATmega161 supports up to 64KB memory, all 16 bits are used. The Stack Pointer points to the data SRAM stack area where the Subroutine and Interrupt Stacks are located. This Stack space in the data SRAM must be defined by the program before any subroutine calls are executed or interrupts are enabled. The stack pointer must be set to point above $60. The Stack Pointer is decremented by one when data is pushed onto the Stack with the PUSH instruction, and it is decremented by two when an address is pushed onto the Stack with subroutine calls and interrupts. The Stack Pointer is incremented by one when data is popped from the Stack with the POP instruction, and it is incremented by two when an address is popped from the Stack with return from subroutine RET or return from interrupt RETI. Reset and Interrupt Handling The ATmega161 provides 20 different interrupt sources. These interrupts and the separate reset vector, each have a sep- arate program vector in the program memory space. All interrupts are assigned individual enable bits which must be set (one) together with the I-bit in the status register in order to enable the interrupt. The lowest addresses in the program memory space are automatically defined as the Reset and Interrupt vectors. The complete list of vectors is shown in Table 2. The list also determines the priority levels of the different interrupts. The lower the address the higher is the priority level. RESET has the highest priority, and next is INT0 – the External Interrupt Request 0 etc. Bit 15 14131211 10 9 8 $3E ($5E) SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SPH $3D ($5D) SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 SPL 76 543 210 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial value 0 0 0 0 0 0 0 0 00 000 000 Table 2. Reset and Interrupt Vectors Vector No. Program Address Source Interrupt Definition 1 $000 RESET External Pin, Power-on Reset, Brown-out Reset and Watchdog Reset 2 $002 INT0 External Interrupt Request 0 3 $004 INT1 External Interrupt Request 1 4 $006 INT2 External Interrupt Request 2 5 $008 TIMER2 COMP Timer/Counter2 Compare Match 6 $00a TIMER2 OVF Timer/Counter2 Overflow 7 $00c TIMER1 CAPT Timer/Counter1 Capture Event 8 $00e TIMER1 COMPA Timer/Counter1 Compare Match A 9 $010 TIMER1 COMPB Timer/Counter1 Compare Match B 10 $012 TIMER1 OVF Timer/Counter1 Overflow 11 $014 TIMER0 COMP Timer/Counter0 Compare Match 12 $016 TIMER0 OVF Timer/Counter0 Overflow 13 $018 SPI, STC Serial Transfer Complete 14 $01a UART0, RX UART0, Rx Complete 15 $01c UART1, RX UART1, Rx Complete |
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