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AT27LV040A Datasheet(PDF) 8 Page - ATMEL Corporation

No. de pieza AT27LV040A
Descripción Electrónicos  4 Megabit 512K x 8 Low Voltage OTP CMOS EPROM
PDF  9 Pages
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Fabricante Electrónico  ATMEL [ATMEL Corporation]
Página de inicio  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT27LV040A Datasheet(HTML) 8 Page - ATMEL Corporation

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AC Programming Characteristics
TA = 25
± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Sym-
bol
Parameter
Test
Conditions*
(1)
Limits
Units
Min
Max
tAS
Address Setup Time
2
µs
tOES
OE Setup Time
2
µs
tDS
Data Setup Time
2
µs
tAH
Address Hold Time
0
µs
tDH
Data Hold Time
2
µs
tDFP
OE High to
Output Float Delay
(2)
0130
ns
tVPS
VPP Setup Time
2
µs
tVCS
VCC Setup Time
2
µs
tPW
CE Program Pulse Width
(3)
95
105
µs
tOE
Data Valid from OE
(2)
150
ns
tPRT
VPP Pulse Rise Time
During Programming
50
ns
*AC Conditions of Test:
Input Rise and Fall Times (10% to 90%).....................20 ns
Input Pulse Levels..........................................0.45V to 2.4V
Input Timing Reference Level..........................0.8V to 2.0V
Output Timing Reference Level.......................0.8V to 2.0V
Notes: 1. VCC must be applied simultaneously or before
VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100%
tested. Output Float is defined as the point where
data is no longer driven —see timing diagram.
3. Program Pulse width tolerance is 100
µsec ± 5%.
Atmel’s 27LV040A Integrated
Product Identification Code
(1)
Codes
Pins
Hex
Data
A0
O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer
00
0011110
1E
Device Type
10
0001011
0B
Note:
1. The AT27LV040A has the same Product
Identification Code as the AT27C040. Both are
programming compatible.
Rapid Programming Algorithm
A 100
µs CE pulse width is used to program. The address
is set to the first location. VCC is raised to 6.5V and VPP is
raised to 13.0V. Each address is first programmed with
one 100
µs CE pulse without verification. Then a verifica-
tion/reprogramming loop is executed for each address. In
the event a byte fails to pass verification, up to 10 succes-
sive 100
µs pulses are applied with a verification after
each pulse. If the byte fails to verify after 10 pulses have
been applied, the part is considered failed. After the byte
verifies properly, the next address is selected until all have
been checked. VPP is then lowered to 5.0V and VCC to
5.0V. All bytes are read again and compared with the
original data to determine if the device passes or fails.
3-122
AT27LV040A



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