AS5030 datasheet(10/44 Pages) AMSCO

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AS5030

Datasheet - Electrical Character i s t ics

6.10 General Data Transmission Timings

See Figure 5 for the corresponding timing diagram.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

Rising CLK to CS

CLK/2

+50

Chip select to positive edge of CLK

Chip select to drive bus externally

Setup time command bit data valid to

positive edge of CLK

Hold time command bit data valid after

positive edge of CLK

Float time positive edge of CLK for last

command bit to bus float

CLK/2 +0

Bus driving time positive edge of CLK for

last command bit to bus drive

CLK/2

Setup time data bit data valid to positive

edge of CLK

CLK/2

+30

Hold time data bit data valid after positive

edge of CLK

CLK/2

Hold time chip select positive edge CLK to

negative edge of chip select

CLK/2

+50

t10

Bus floating time negative edge of chip

select to float bus

t11

Hold time data bit @ write access

data valid to positive edge of CLK

t12

Hold time data bit @ write access

data valid after positive edge of CLK

t13

Bus floating time negative edge of chip

select to float bus

tTO

Timeout period in 2-wire mode

(from rising edge of CLK)

µs

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