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IO96NDB2V1 Datasheet(PDF) 52 Page - Microsemi Corporation

No. de pieza IO96NDB2V1
Descripción Electrónicos  ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology
PDF  242 Pages
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Fabricante Electrónico  MICROSEMI [Microsemi Corporation]
Página de inicio  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

IO96NDB2V1 Datasheet(HTML) 52 Page - Microsemi Corporation

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ProASIC3L DC and Switching Characteristics
2-36
Revision 13
Table 2-38 • I/O Output Buffer Maximum Resistances1
Applicable to Standard Plus I/O Banks
Standard
Drive
Strength
RPULL-DOWN
(
) 2
RPULL-UP
(
) 3
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
100
300
4 mA
100
300
6 mA
50
150
8 mA
50
150
12 mA
25
75
16 mA
25
75
3.3 V LVCMOS Wide Range
100 µA
Same as regular 3.3 V LVCMOS Same as regular 3.3 V LVCMOS
2.5 V LVCMOS
2 mA
100
200
4 mA
100
200
6 mA
50
100
8 mA
50
100
12 mA
25
50
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
6 mA
50
56
8 mA
50
56
1.5 V LVCMOS
2 mA
200
224
4 mA
100
112
1.2 V LVCMOS
2 mA
158
164
1.2 V LVCMOS Wide Range
100 µA
Same as regular 1.2 V LVCMOS Same as regular 1.2 V LVCMOS
3.3 V PCI/PCI-X
Per PCI/PCI-X
specification
25
75
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
on VCCI, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located at http://www.microsemi.com/soc/download/ibis/default.aspx.
2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec
3. R(PULL-UP-MAX) = (VCCImax – VOHspec) / IOHspec



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