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AS1130

Datasheet - R e g i s t e r D e s c r i p t i o n

Interrupt Status Register (0x0E)

This is a read only register. Within this register the cause of an interrupt can be read out. After power up or a reset the default setting of this reg-

ister is 0x20. A read out command will set this register to default and the IRQ pin will be released again.

1

sync_out

0

R/W

The internal oscillator is used as system-clk. The selected clk frequency is

available on pin D4 for synchronization. (Output)

1

0: disabled

1: enabled

0

sync_in

0

R/W

The internal oscillator is disabled. Pin D4 is used as clk input for system-clk.

1

0: disabled

1: enabled

1. CLK synchronization is done via the SYNC pin. Only one option can be activated (Input or Output).

Table 26. Interrupt Status Register Format

0x0E Interrupt Status Register

Bit

Bit Name

Default

Access

Bit Description

7

frame_int

0

R

0: no interrupt

1: defined Frame is displayed (see Interrupt Frame Definition

Register (0x08) on page 26)

6

i2c_int

0

R

0: no interrupt

1: I²C watchdog reports a deadlock on the interface

5

por_int

1

R

0: no interrupt

1: POR was triggered

4

overtemp_int

0

R

0: no interrupt

1: over temperature limit is reached

3

low_vdd_int

0

R

0: no interrupt

2

open_int

0

R

0: no interrupt

1: error on open test

1

short_int

0

R

0: no interrupt

1: error on short test

0

movie_int

0

R

0: no interrupt

1: play movie is finished

Table 25. CLK Synchronization Register Format

0x0B CLK Synchronization Register

Bit

Bit Name

Default

Access

Bit Description