APExx24 Series

Rev 1.1

2003/9/2

2

(12) External Reset: Port B[3] can be configured as reset pin. (Mask opton)

(13) HALT and Release from HALT function to reduce power consumption

(14) Watch Dog Timer (WDT)

(15) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles

(16) Number of instruction: 27

(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).

FIGURE 1 : ROM Map of

APExx24 Series

16-bit x 2 STACK

Reset Vector

00000h-0FFFFh

16-bit Data Pointer

PC[15:0]

Reserved for Testing

000FFh-00400h

00401h

00000h

000FEh

Program ROM

00000h-0FFFFh

Data ROM for Melody

20-bit Voice Pointer

00000h-FFFFFh

Voice ROM for Voice